@@ -206,15 +206,24 @@ static uint16_t tx_sequence = 0xffff;
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static uint32_t tx_time = 0 ;
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static uint32_t rx_time = 0 ;
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static uint32_t tx_finnish_time = 0 ;
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- static uint32_t symbols_in_seconds ;
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+ static uint32_t rf_symbol_rate ;
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static bool cca_enabled = true ;
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static uint8_t s2lp_PAN_ID[2 ] = {0xff , 0xff };
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static uint8_t s2lp_short_address[2 ];
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static uint8_t s2lp_MAC[8 ];
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static rf_mode_e rf_mode = RF_MODE_NORMAL;
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+ static bool rf_update_config = false ;
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/* Channel configurations for sub-GHz */
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- static const phy_rf_channel_configuration_s phy_subghz = {868300000U , 500000U , 250000U , 11U , M_UNDEFINED};
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+ static phy_rf_channel_configuration_s phy_subghz = {
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+ .channel_0_center_frequency = 868300000U ,
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+ .channel_spacing = 500000U ,
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+ .datarate = 250000U ,
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+ .number_of_channels = 11U ,
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+ .modulation = M_2FSK,
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+ .modulation_index = MODULATION_INDEX_UNDEFINED
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+ };
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+
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static const phy_device_channel_page_s phy_channel_pages[] = {
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{ CHANNEL_PAGE_2, &phy_subghz},
@@ -236,8 +245,8 @@ static void rf_irq_task_process_irq();
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#define ACK_FRAME_LENGTH 3
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// Give some additional time for processing, PHY headers, CRC etc.
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- #define PACKET_SENDING_EXTRA_TIME 10000
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- #define MAX_PACKET_SENDING_TIME (uint32_t )(8000000 /phy_subghz.datarate)*RF_MTU + PACKET_SENDING_EXTRA_TIME
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+ #define PACKET_SENDING_EXTRA_TIME 5000
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+ #define MAX_PACKET_SENDING_TIME (uint32_t )(8000000 /phy_subghz.datarate)*FIFO_SIZE + PACKET_SENDING_EXTRA_TIME
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#define ACK_SENDING_TIME (uint32_t )(8000000 /phy_subghz.datarate)*ACK_FRAME_LENGTH + PACKET_SENDING_EXTRA_TIME
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#ifdef TEST_GPIOS_ENABLED
@@ -259,11 +268,11 @@ void test2_toggle(void)
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}
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#endif // TEST_GPIOS_ENABLED
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- static void rf_calculate_symbols_in_seconds (uint32_t baudrate, phy_modulation_e modulation)
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+ static void rf_calculate_symbol_rate (uint32_t baudrate, phy_modulation_e modulation)
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{
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(void ) modulation;
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uint8_t bits_in_symbols = 1 ;
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- symbols_in_seconds = baudrate / bits_in_symbols;
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+ rf_symbol_rate = baudrate / bits_in_symbols;
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}
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static uint32_t rf_get_timestamp (void )
@@ -419,12 +428,13 @@ static void rf_state_change(s2lp_states_e state, bool lock_mode_tx)
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rf_poll_state_change (state);
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}
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- static uint8_t rf_write_tx_fifo (uint8_t *ptr, uint16_t length, uint8_t max_write )
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+ static uint8_t rf_write_tx_fifo (uint8_t *ptr, uint16_t length)
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{
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+ uint8_t free_bytes_in_fifo = FIFO_SIZE - rf_read_register (TX_FIFO_STATUS);
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const uint8_t spi_header[SPI_HEADER_LENGTH] = {SPI_WR_REG, TX_FIFO};
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uint8_t written_length = length;
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- if (length > max_write ) {
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- written_length = max_write ;
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+ if (length > free_bytes_in_fifo ) {
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+ written_length = free_bytes_in_fifo ;
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}
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CS_SELECT ();
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rf_spi_exchange (spi_header, SPI_HEADER_LENGTH, NULL , 0 );
@@ -463,28 +473,30 @@ static uint32_t read_irq_status(void)
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return (((uint32_t )rx[2 ] << 24 ) | ((uint32_t )rx[3 ] << 16 ) | ((uint32_t )rx[4 ] << 8 ) | rx[5 ]);
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}
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- static void rf_init_registers (void )
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+ static void rf_set_channel_configuration_registers (void )
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{
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- rf_write_register_field (PCKTCTRL3, PCKT_FORMAT_FIELD, PCKT_FORMAT_802_15_4);
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// Set deviation
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+ uint32_t deviation = rf_conf_calculate_deviation (phy_subghz.modulation_index , phy_subghz.datarate );
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+ if (!deviation) {
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+ deviation = DEFAULT_DEVIATION;
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+ }
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uint8_t fdev_m, fdev_e;
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- rf_conf_calculate_deviation_registers (DEVIATION , &fdev_m, &fdev_e);
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+ rf_conf_calculate_deviation_registers (deviation , &fdev_m, &fdev_e);
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rf_write_register (MOD0, fdev_m);
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rf_write_register_field (MOD1, FDEV_E_FIELD, fdev_e);
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- rf_write_register_field (MOD2, MOD_TYPE_FIELD, MOD_2FSK);
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+
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// Set datarate
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uint16_t datarate_m;
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uint8_t datarate_e;
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rf_conf_calculate_datarate_registers (phy_subghz.datarate , &datarate_m, &datarate_e);
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rf_write_register_field (MOD2, DATARATE_E_FIELD, datarate_e);
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rf_write_register (MOD3, (uint8_t )datarate_m);
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rf_write_register (MOD4, datarate_m >> 8 );
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- // Set RX filter bandwidth
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+ // Set RX filter bandwidth, using channel spacing as RX filter bandwidth
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uint8_t chflt_m, chflt_e;
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- rf_conf_calculate_rx_filter_bandwidth_registers (RX_FILTER_BANDWIDTH , &chflt_m, &chflt_e);
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+ rf_conf_calculate_rx_filter_bandwidth_registers (phy_subghz. channel_spacing , &chflt_m, &chflt_e);
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rf_write_register_field (CHFLT, CHFLT_M_FIELD, chflt_m << 4 );
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rf_write_register_field (CHFLT, CHFLT_E_FIELD, chflt_e);
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- rf_write_register (PCKT_FLT_OPTIONS, 0 );
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// Set base frequency (Channel 0 center frequency)
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uint8_t synt3, synt2, synt1, synt0;
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rf_conf_calculate_base_frequency_registers (phy_subghz.channel_0_center_frequency , &synt3, &synt2, &synt1, &synt0);
@@ -500,6 +512,19 @@ static void rf_init_registers(void)
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rf_channel_multiplier++;
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}
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rf_write_register (CHSPACE, ch_space);
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+ tr_info (" RF config update:" );
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+ tr_info (" Frequency(ch0): %luHz" , phy_subghz.channel_0_center_frequency );
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+ tr_info (" Channel spacing: %luHz" , phy_subghz.channel_spacing );
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+ tr_info (" Datarate: %lubps" , phy_subghz.datarate );
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+ tr_info (" Deviation: %luHz" , deviation);
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+ tr_info (" RX BW M: %u, E: %u" , chflt_m, chflt_e);
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+ }
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+
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+ static void rf_init_registers (void )
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+ {
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+ rf_write_register_field (PCKTCTRL3, PCKT_FORMAT_FIELD, PCKT_FORMAT_802_15_4);
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+ rf_write_register_field (MOD2, MOD_TYPE_FIELD, MOD_2FSK);
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+ rf_write_register (PCKT_FLT_OPTIONS, 0 );
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rf_write_register_field (PCKTCTRL1, PCKT_CRCMODE_FIELD, PCKT_CRCMODE_0X1021);
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rf_write_register_field (PCKTCTRL1, PCKT_TXSOURCE_FIELD, PCKT_TXSOURCE_NORMAL);
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rf_write_register_field (PCKTCTRL1, PCKT_WHITENING_FIELD, PCKT_WHITENING_ENABLED);
@@ -515,6 +540,7 @@ static void rf_init_registers(void)
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uint8_t rssi_th;
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rf_conf_calculate_rssi_threshold_registers (RSSI_THRESHOLD, &rssi_th);
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rf_write_register (RSSI_TH, rssi_th);
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+ rf_set_channel_configuration_registers ();
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}
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static int8_t rf_address_write (phy_address_type_e address_type, uint8_t *address_ptr)
@@ -544,6 +570,7 @@ static int8_t rf_extension(phy_extension_type_e extension_type, uint8_t *data_pt
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{
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int8_t retval = 0 ;
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phy_csma_params_t *csma_params;
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+ phy_rf_channel_configuration_s *channel_params;
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uint32_t *timer_value;
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switch (extension_type) {
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case PHY_EXTENSION_SET_CHANNEL:
@@ -602,9 +629,22 @@ static int8_t rf_extension(phy_extension_type_e extension_type, uint8_t *data_pt
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case PHY_EXTENSION_GET_SYMBOLS_PER_SECOND:
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timer_value = (uint32_t *)data_ptr;
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- *timer_value = symbols_in_seconds;
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+ *timer_value = rf_symbol_rate;
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+ break ;
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+ case PHY_EXTENSION_SET_RF_CONFIGURATION:
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+ channel_params = (phy_rf_channel_configuration_s *)data_ptr;
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+ phy_subghz.datarate = channel_params->datarate ;
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+ phy_subghz.channel_spacing = channel_params->channel_spacing ;
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+ phy_subghz.channel_0_center_frequency = channel_params->channel_0_center_frequency ;
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+ phy_subghz.number_of_channels = channel_params->number_of_channels ;
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+ phy_subghz.modulation = channel_params->modulation ;
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+ phy_subghz.modulation_index = channel_params->modulation_index ;
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+ rf_calculate_symbol_rate (phy_subghz.datarate , phy_subghz.modulation );
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+ rf_update_config = true ;
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+ if (rf_state == RF_IDLE) {
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+ rf_receive (rf_rx_channel);
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+ }
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break ;
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-
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default :
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break ;
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}
@@ -660,28 +700,30 @@ static void rf_tx_sent_handler(void)
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static void rf_tx_threshold_handler (void )
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{
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+ rf_backup_timer_stop ();
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rf_disable_interrupt (TX_FIFO_ALMOST_EMPTY);
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// TODO check the FIFO threshold. By default, threshold is half of the FIFO size
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- uint8_t written_length = rf_write_tx_fifo (tx_data_ptr, tx_data_length, FIFO_SIZE / 2 );
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+ uint8_t written_length = rf_write_tx_fifo (tx_data_ptr, tx_data_length);
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if (written_length < tx_data_length) {
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tx_data_ptr += written_length;
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tx_data_length -= written_length;
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rf_enable_interrupt (TX_FIFO_ALMOST_EMPTY);
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}
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+ rf_backup_timer_start (MAX_PACKET_SENDING_TIME);
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}
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static void rf_start_tx (void )
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{
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+ rf_send_command (S2LP_CMD_SABORT);
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rf_disable_all_interrupts ();
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+ rf_poll_state_change (S2LP_STATE_READY);
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+ rf_state_change (S2LP_STATE_TX, false );
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// More TX data to be written in FIFO when TX threshold interrupt occurs
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if (tx_data_ptr) {
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rf_enable_interrupt (TX_FIFO_ALMOST_EMPTY);
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}
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rf_enable_interrupt (TX_DATA_SENT);
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rf_enable_interrupt (TX_FIFO_UNF_OVF);
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- rf_state_change (S2LP_STATE_READY, false );
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- rf_state_change (S2LP_STATE_LOCK, true );
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- rf_state_change (S2LP_STATE_TX, false );
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rf_backup_timer_start (MAX_PACKET_SENDING_TIME);
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}
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@@ -694,7 +736,7 @@ static void rf_cca_timer_interrupt(void)
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rf_state = RF_IDLE;
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return ;
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}
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- if ((cca_enabled == true ) && (rf_read_register (LINK_QUALIF1) & CARRIER_SENSE || ( rf_state != RF_CSMA_STARTED && rf_state != RF_IDLE))) {
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+ if ((cca_enabled == true ) && (( rf_state != RF_CSMA_STARTED && rf_state != RF_IDLE) || ( read_irq_status () & ( 1 << SYNC_WORD)) || ( rf_read_register (LINK_QUALIF1) & CARRIER_SENSE ))) {
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if (rf_state == RF_CSMA_STARTED) {
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rf_state = RF_IDLE;
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}
@@ -765,7 +807,7 @@ static int8_t rf_start_cca(uint8_t *data_ptr, uint16_t data_length, uint8_t tx_h
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return -1 ;
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}
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rf_state = RF_CSMA_STARTED;
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- uint8_t written_length = rf_write_tx_fifo (data_ptr, data_length, FIFO_SIZE );
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+ uint8_t written_length = rf_write_tx_fifo (data_ptr, data_length);
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if (written_length < data_length) {
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tx_data_ptr = data_ptr + written_length;
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tx_data_length = data_length - written_length;
@@ -789,7 +831,8 @@ static int8_t rf_start_cca(uint8_t *data_ptr, uint16_t data_length, uint8_t tx_h
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return 0 ;
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}
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}
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- rf_cca_timer_interrupt ();
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+ // Short timeout to start CCA immediately.
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+ rf_cca_timer_start (1 );
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rf_unlock ();
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return 0 ;
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}
@@ -805,7 +848,7 @@ static void rf_send_ack(uint8_t seq)
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}
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rf_state = RF_TX_ACK;
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uint8_t ack_frame[3 ] = {MAC_TYPE_ACK, 0 , seq};
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- rf_write_tx_fifo (ack_frame, sizeof (ack_frame), FIFO_SIZE );
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+ rf_write_tx_fifo (ack_frame, sizeof (ack_frame));
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rf_write_packet_length (sizeof (ack_frame) + 4 );
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tx_data_ptr = NULL ;
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rf_start_tx ();
@@ -841,11 +884,11 @@ static void rf_rx_ready_handler(void)
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}
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rx_data_length += rx_read_length;
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if (rf_mode != RF_MODE_SNIFFER) {
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+ rf_state = RF_IDLE;
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uint8_t version = ((rx_buffer[1 ] & VERSION_FIELD_MASK) >> SHIFT_VERSION_FIELD);
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if (((rx_buffer[0 ] & MAC_FRAME_TYPE_MASK) == MAC_TYPE_ACK) && (version < MAC_FRAME_VERSION_2)) {
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rf_handle_ack (rx_buffer[2 ], rx_buffer[0 ] & MAC_DATA_PENDING);
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} else if (rf_rx_filter (rx_buffer, s2lp_MAC, s2lp_short_address, s2lp_PAN_ID)) {
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- rf_state = RF_IDLE;
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int8_t rssi = (rf_read_register (RSSI_LEVEL) - RSSI_OFFSET);
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if (device_driver.phy_rx_cb ) {
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device_driver.phy_rx_cb (rx_buffer, rx_data_length, 0xf0 , rssi, rf_radio_driver_id);
@@ -869,12 +912,14 @@ static void rf_rx_ready_handler(void)
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static void rf_rx_threshold_handler (void )
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{
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+ rf_backup_timer_stop ();
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int rx_read_length = rf_read_rx_fifo (rx_data_length, rf_read_register (RX_FIFO_STATUS));
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if (rx_read_length < 0 ) {
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rf_receive (rf_rx_channel);
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return ;
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}
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rx_data_length += rx_read_length;
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+ rf_backup_timer_start (MAX_PACKET_SENDING_TIME);
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}
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static void rf_sync_detected_handler (void )
@@ -896,6 +941,10 @@ static void rf_receive(uint8_t rx_channel)
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rf_state_change (S2LP_STATE_READY, false );
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rf_send_command (S2LP_CMD_FLUSHRXFIFO);
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rf_poll_state_change (S2LP_STATE_READY);
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+ if (rf_update_config == true ) {
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+ rf_update_config = false ;
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+ rf_set_channel_configuration_registers ();
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+ }
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if (rx_channel != rf_rx_channel) {
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rf_write_register (CHNUM, rx_channel * rf_channel_multiplier);
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rf_rx_channel = rf_new_channel = rx_channel;
@@ -953,17 +1002,18 @@ static void rf_interrupt_handler(void)
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}
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}
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if ((irq_status & (1 << TX_FIFO_UNF_OVF)) && (enabled_interrupts & (1 << TX_FIFO_UNF_OVF))) {
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+ rf_backup_timer_stop ();
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tx_finnish_time = rf_get_timestamp ();
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TEST_TX_DONE
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- device_driver.phy_tx_done_cb (rf_radio_driver_id, mac_tx_handle, PHY_LINK_TX_FAIL , 1 , 0 );
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+ device_driver.phy_tx_done_cb (rf_radio_driver_id, mac_tx_handle, PHY_LINK_CCA_FAIL , 1 , 0 );
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rf_send_command (S2LP_CMD_SABORT);
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rf_poll_state_change (S2LP_STATE_READY);
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rf_send_command (S2LP_CMD_FLUSHTXFIFO);
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rf_poll_state_change (S2LP_STATE_READY);
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rf_state = RF_IDLE;
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rf_receive (rf_rx_channel);
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}
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- if (rf_state == RF_IDLE || rf_state == RF_TX_STARTED) {
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+ if (rf_state == RF_IDLE || rf_state == RF_CSMA_STARTED || rf_state == RF_TX_STARTED) {
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if ((irq_status & (1 << SYNC_WORD)) && (enabled_interrupts & (1 << SYNC_WORD))) {
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rf_sync_detected_handler ();
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}
@@ -972,6 +1022,8 @@ static void rf_interrupt_handler(void)
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if (!(irq_status & (1 << CRC_ERROR))) {
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rf_rx_ready_handler ();
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} else {
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+ TEST_RX_DONE
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+ rf_backup_timer_stop ();
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rf_state = RF_IDLE;
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// In case the channel change was called during reception, driver is responsible to change the channel if CRC failed.
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rf_receive (rf_new_channel);
@@ -1006,8 +1058,7 @@ static void rf_reset(void)
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wait_ms (10 );
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// Wake up
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rf->SDN = 0 ;
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- // Wait until GPIO0 (RESETN) goes high
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- while (rf->RF_S2LP_GPIO0 == 0 );
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+ wait_ms (10 );
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}
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static void rf_init (void )
@@ -1019,15 +1070,9 @@ static void rf_init(void)
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rf_reset ();
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rf->spi .frequency (10000000 );
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CS_RELEASE ();
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- if (PARTNUM != rf_read_register (DEVICE_INFO1)) {
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- tr_err (" Invalid part number: %x" , rf_read_register (DEVICE_INFO1));
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- }
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- if (VERSION != rf_read_register (DEVICE_INFO0)) {
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- tr_err (" Invalid version: %x" , rf_read_register (DEVICE_INFO0));
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- }
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rf_init_registers ();
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rf_enable_gpio_interrupt ();
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- rf_calculate_symbols_in_seconds (phy_subghz.datarate , phy_subghz.modulation );
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+ rf_calculate_symbol_rate (phy_subghz.datarate , phy_subghz.modulation );
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rf->tx_timer .start ();
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rf_print_registers ();
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}
@@ -1071,12 +1116,31 @@ static void rf_device_unregister()
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void NanostackRfPhys2lp::get_mac_address (uint8_t *mac)
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{
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+ rf_lock ();
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+
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+ if (NULL == rf) {
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+ error (" NanostackRfPhys2lp Must be registered to read mac address" );
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+ rf_unlock ();
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+ return ;
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+ }
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+ memcpy ((void *)mac, (void *)_mac_addr, sizeof (_mac_addr));
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+ rf_unlock ();
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}
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void NanostackRfPhys2lp::set_mac_address (uint8_t *mac)
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{
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+ rf_lock ();
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+ if (NULL != rf) {
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+ error (" NanostackRfPhys2lp cannot change mac address when running" );
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+ rf_unlock ();
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+ return ;
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+ }
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+ memcpy ((void *)_mac_addr, (void *)mac, sizeof (_mac_addr));
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+ _mac_set = true ;
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+
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+ rf_unlock ();
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}
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int8_t NanostackRfPhys2lp::rf_register ()
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