Update memory layout for nrf51 targets.

pan- · pan- · commit ea0ae68c6077 · 2016-07-19T23:39:52.000+01:00
diff --git a/hal/targets/cmsis/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF51822/TOOLCHAIN_ARM_STD/TARGET_MCU_NORDIC_32K/nRF51822.sct b/hal/targets/cmsis/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF51822/TOOLCHAIN_ARM_STD/TARGET_MCU_NORDIC_32K/nRF51822.sct
@@ -12,13 +12,13 @@
 ;
 ;WITH SOFTDEVICE:
 
-LR_IROM1 0x1C000 0x0024000  {
-  ER_IROM1 0x1C000 0x0024000  {
+LR_IROM1 0x0001B000 0x0025000  {
+  ER_IROM1 0x0001B000 0x0025000  {
    *.o (RESET, +First)
    *(InRoot$$Sections)
    .ANY (+RO)
   }
-  RW_IRAM1 0x20002800 0x00005800  {
+  RW_IRAM1 0x20002ef8 0x5108  {
    .ANY (+RW +ZI)
   }
 }
diff --git a/hal/targets/cmsis/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF51822/TOOLCHAIN_ARM_STD/TARGET_MCU_NRF51_16K_S110/nRF51822.sct b/hal/targets/cmsis/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF51822/TOOLCHAIN_ARM_STD/TARGET_MCU_NRF51_16K_S110/nRF51822.sct
@@ -12,13 +12,13 @@
 ;
 ;WITH SOFTDEVICE:
 
-LR_IROM1 0x18000 0x0028000  {
-  ER_IROM1 0x18000 0x0028000  {
+LR_IROM1 0x0001B000 0x0025000  {
+  ER_IROM1 0x0001B000 0x0025000  {
    *.o (RESET, +First)
    *(InRoot$$Sections)
    .ANY (+RO)
   }
-  RW_IRAM1 0x20002000 0x00002000  {
+  RW_IRAM1 0x20002ef8 0x1108  {
    .ANY (+RW +ZI)
   }
 }
diff --git a/hal/targets/cmsis/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF51822/TOOLCHAIN_ARM_STD/TARGET_MCU_NRF51_16K_S130/nRF51822.sct b/hal/targets/cmsis/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF51822/TOOLCHAIN_ARM_STD/TARGET_MCU_NRF51_16K_S130/nRF51822.sct
@@ -12,13 +12,13 @@
 ;
 ;WITH SOFTDEVICE:
 
-LR_IROM1 0x1C000 0x0024000  {
-  ER_IROM1 0x1C000 0x0024000  {
+LR_IROM1 0x0001B000 0x0025000  {
+  ER_IROM1 0x0001B000 0x0025000  {
    *.o (RESET, +First)
    *(InRoot$$Sections)
    .ANY (+RO)
   }
-  RW_IRAM1 0x20002800 0x00001800  {
+  RW_IRAM1 0x20002ef8 0x1108  {
    .ANY (+RW +ZI)
   }
 }

Original file line number	Diff line number	Diff line change
`@@ -12,13 +12,13 @@`
`12`	`12`	`;`
`13`	`13`	`;WITH SOFTDEVICE:`
`14`	`14`
`15`		`-LR_IROM1 0x1C000 0x0024000 {`
`16`		`- ER_IROM1 0x1C000 0x0024000 {`
	`15`	`+LR_IROM1 0x0001B000 0x0025000 {`
	`16`	`+ ER_IROM1 0x0001B000 0x0025000 {`
`17`	`17`	`*.o (RESET, +First)`
`18`	`18`	`*(InRoot$$Sections)`
`19`	`19`	`.ANY (+RO)`
`20`	`20`	`}`
`21`		`- RW_IRAM1 0x20002800 0x00005800 {`
	`21`	`+ RW_IRAM1 0x20002ef8 0x5108 {`
`22`	`22`	`.ANY (+RW +ZI)`
`23`	`23`	`}`
`24`	`24`	`}`