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| 1 | +#! armcc -E |
| 2 | +/* |
| 3 | +** ################################################################### |
| 4 | +** Processors: MKL43Z256VLH4 |
| 5 | +** MKL43Z256VMP4 |
| 6 | +** |
| 7 | +** Compiler: Keil ARM C/C++ Compiler |
| 8 | +** Reference manual: KL43P64M48SF6RM, Rev.3, Aug 2014 |
| 9 | +** Version: rev. 1.6, 2015-07-29 |
| 10 | +** Build: b160406 |
| 11 | +** |
| 12 | +** Abstract: |
| 13 | +** Linker file for the Keil ARM C/C++ Compiler |
| 14 | +** |
| 15 | +** Copyright (c) 2016 Freescale Semiconductor, Inc. |
| 16 | +** All rights reserved. |
| 17 | +** |
| 18 | +** Redistribution and use in source and binary forms, with or without modification, |
| 19 | +** are permitted provided that the following conditions are met: |
| 20 | +** |
| 21 | +** o Redistributions of source code must retain the above copyright notice, this list |
| 22 | +** of conditions and the following disclaimer. |
| 23 | +** |
| 24 | +** o Redistributions in binary form must reproduce the above copyright notice, this |
| 25 | +** list of conditions and the following disclaimer in the documentation and/or |
| 26 | +** other materials provided with the distribution. |
| 27 | +** |
| 28 | +** o Neither the name of Freescale Semiconductor, Inc. nor the names of its |
| 29 | +** contributors may be used to endorse or promote products derived from this |
| 30 | +** software without specific prior written permission. |
| 31 | +** |
| 32 | +** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND |
| 33 | +** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
| 34 | +** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| 35 | +** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR |
| 36 | +** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
| 37 | +** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
| 38 | +** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON |
| 39 | +** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 40 | +** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
| 41 | +** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 42 | +** |
| 43 | +** http: www.freescale.com |
| 44 | + |
| 45 | +** |
| 46 | +** ################################################################### |
| 47 | +*/ |
| 48 | +#define __ram_vector_table__ 1 |
| 49 | + |
| 50 | +/* Heap 1/4 of ram and stack 1/8 */ |
| 51 | +#define __stack_size__ 0x1000 |
| 52 | +#define __heap_size__ 0x2800 |
| 53 | + |
| 54 | +#if (defined(__ram_vector_table__)) |
| 55 | + #define __ram_vector_table_size__ 0x00000200 |
| 56 | +#else |
| 57 | + #define __ram_vector_table_size__ 0x00000000 |
| 58 | +#endif |
| 59 | + |
| 60 | +#define m_interrupts_start 0x00000000 |
| 61 | +#define m_interrupts_size 0x00000200 |
| 62 | + |
| 63 | +#define m_flash_config_start 0x00000400 |
| 64 | +#define m_flash_config_size 0x00000010 |
| 65 | + |
| 66 | +#define m_text_start 0x00000410 |
| 67 | +#define m_text_size 0x0003FBF0 |
| 68 | + |
| 69 | +#define m_interrupts_ram_start 0x1FFFE000 |
| 70 | +#define m_interrupts_ram_size __ram_vector_table_size__ |
| 71 | + |
| 72 | +#define m_data_start (m_interrupts_ram_start + m_interrupts_ram_size) |
| 73 | +#define m_data_size (0x00008000 - m_interrupts_ram_size) |
| 74 | + |
| 75 | +/* Sizes */ |
| 76 | +#if (defined(__stack_size__)) |
| 77 | + #define Stack_Size __stack_size__ |
| 78 | +#else |
| 79 | + #define Stack_Size 0x0400 |
| 80 | +#endif |
| 81 | + |
| 82 | +#if (defined(__heap_size__)) |
| 83 | + #define Heap_Size __heap_size__ |
| 84 | +#else |
| 85 | + #define Heap_Size 0x0400 |
| 86 | +#endif |
| 87 | + |
| 88 | +LR_m_text m_interrupts_start m_text_start+m_text_size-m_interrupts_start { ; load region size_region |
| 89 | + VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address |
| 90 | + * (RESET,+FIRST) |
| 91 | + } |
| 92 | + ER_m_flash_config m_flash_config_start FIXED m_flash_config_size { ; load address = execution address |
| 93 | + * (FlashConfig) |
| 94 | + } |
| 95 | + ER_m_text m_text_start m_text_size { ; load address = execution address |
| 96 | + * (InRoot$$Sections) |
| 97 | + .ANY (+RO) |
| 98 | + } |
| 99 | + |
| 100 | +#if (defined(__ram_vector_table__)) |
| 101 | + VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size { |
| 102 | + } |
| 103 | +#else |
| 104 | + VECTOR_RAM m_interrupts_start EMPTY 0 { |
| 105 | + } |
| 106 | +#endif |
| 107 | + RW_m_data m_data_start m_data_size-Stack_Size-Heap_Size { ; RW data |
| 108 | + .ANY (+RW +ZI) |
| 109 | + } |
| 110 | + RW_IRAM1 +0 EMPTY Heap_Size { ; Heap region growing up |
| 111 | + } |
| 112 | +} |
| 113 | + |
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