M263: Enable configurability for memory specification

This is to support custom boards based on M261 series chips.

Author: ccli8

targets/TARGET_NUVOTON/TARGET_M261/device/M261_mem.h

@@ -0,0 +1,133 @@
+/*
+ * Copyright (c) 2020, Nuvoton Technology Corporation
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __M261_MEM_H__
+#define __M261_MEM_H__
+
+/* About M261_mem.h/M261_mem.icf.h
+ *
+ * 1. M261_mem.h is created for centralizing memory configuration. It will be included by C/C++ files
+ *    and linker files (except IAR linker file).
+ * 2. IAR linker doesn't support preprocessor, so M261_mem.icf.h, duplicate of M261_mem.h
+ *    is created for IAR linker file.
+ * 3. To continue above, we name M261_mem.icf.h instead of M261_mem.icf because:
+ *    (1) Mbed OS build tool may mis-regard M261_mem.icf as the main linker configuration file.
+ *    (2) *.icf files may not be present in search directories for "include" directive. Per observation,
+ *        the search directories are inconsistent among normal example build and test code build. To address
+ *        it, we name M261_mem.icf.h instead because *.h files are always present in these builds
+ *       (already there or via copy).
+ */
+
+/* Default memory specification
+ *
+ * Flash size:  512KiB
+ * SRAM size:   96KiB
+ */
+
+/* Resolve ROM start */
+#ifndef MBED_ROM_START
+#define MBED_ROM_START          (0x0)
+#endif
+
+/* Resolve ROM size */
+#ifndef MBED_ROM_SIZE
+#define MBED_ROM_SIZE           (0x80000)
+#endif
+
+/* Resolve RAM start */
+#ifndef MBED_RAM_START
+#define MBED_RAM_START          (0x20000000)
+#endif
+
+/* Resolve RAM size */
+#ifndef MBED_RAM_SIZE
+#define MBED_RAM_SIZE           (0x18000)
+#endif
+
+
+/* Mbed build tool passes just APPLICATION_xxx macros to C/C++ files and just
+ * MBED_APP_xxx macros to linker files even though they mean the same thing.
+ * Because this file is to include by both C/C++ files and linker files, we add
+ * these macros according to the others for consistency when they are missing
+ * in compile or link stage. */
+
+#ifndef APPLICATION_ADDR
+#ifdef MBED_APP_START
+#define APPLICATION_ADDR        MBED_APP_START
+#else
+#define APPLICATION_ADDR        MBED_ROM_START
+#endif
+#endif
+
+#ifndef APPLICATION_SIZE
+#ifdef MBED_APP_SIZE
+#define APPLICATION_SIZE        MBED_APP_SIZE
+#else
+#define APPLICATION_SIZE        MBED_ROM_SIZE
+#endif
+#endif
+
+#ifndef APPLICATION_RAM_ADDR
+#ifdef MBED_RAM_APP_START
+#define APPLICATION_RAM_ADDR    MBED_RAM_APP_START
+#else
+#define APPLICATION_RAM_ADDR    MBED_RAM_START
+#endif
+#endif
+
+#ifndef APPLICATION_RAM_SIZE
+#ifdef MBED_RAM_APP_SIZE
+#define APPLICATION_RAM_SIZE    MBED_RAM_APP_SIZE
+#else
+#define APPLICATION_RAM_SIZE    MBED_RAM_SIZE
+#endif
+#endif
+
+#ifndef MBED_APP_START
+#define MBED_APP_START          APPLICATION_ADDR
+#endif
+
+#ifndef MBED_APP_SIZE
+#define MBED_APP_SIZE           APPLICATION_SIZE
+#endif
+
+#ifndef MBED_RAM_APP_START
+#define MBED_RAM_APP_START      APPLICATION_RAM_ADDR
+#endif
+
+#ifndef MBED_RAM_APP_SIZE
+#define MBED_RAM_APP_SIZE       APPLICATION_RAM_SIZE
+#endif
+
+#if (APPLICATION_ADDR != MBED_APP_START)
+#error("APPLICATION_ADDR and MBED_APP_START are not the same!!!")
+#endif
+
+#if (APPLICATION_SIZE != MBED_APP_SIZE)
+#error("APPLICATION_SIZE and MBED_APP_SIZE are not the same!!!")
+#endif
+
+#if (APPLICATION_RAM_ADDR != MBED_RAM_APP_START)
+#error("APPLICATION_RAM_ADDR and MBED_RAM_APP_START are not the same!!!")
+#endif
+
+#if (APPLICATION_RAM_SIZE != MBED_RAM_APP_SIZE)
+#error("APPLICATION_RAM_SIZE and MBED_RAM_APP_SIZE are not the same!!!")
+#endif
+
+#endif  /* __M261_MEM_H__ */

targets/TARGET_NUVOTON/TARGET_M261/device/M261_mem.icf.h

@@ -0,0 +1,115 @@
+/*
+ * Copyright (c) 2020, Nuvoton Technology Corporation
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/* See M261_mem.h for documentation */
+
+/* Default memory specification
+ *
+ * Flash size:  512KiB
+ * SRAM size:   96KiB
+ */
+
+/* Resolve ROM start */
+if (!isdefinedsymbol(MBED_ROM_START)) {
+    define symbol MBED_ROM_START    = 0x0;
+}
+
+/* Resolve ROM size */
+if (!isdefinedsymbol(MBED_ROM_SIZE)) {
+    define symbol MBED_ROM_SIZE     = 0x80000;
+}
+
+/* Resolve RAM start */
+if (!isdefinedsymbol(MBED_RAM_START)) {
+    define symbol MBED_RAM_START    = 0x20000000;
+}
+
+/* Resolve RAM size */
+if (!isdefinedsymbol(MBED_RAM_SIZE)) {
+    define symbol MBED_RAM_SIZE     = 0x18000;
+}
+
+/* Mbed build tool passes just APPLICATION_xxx macros to C/C++ files and just
+ * MBED_APP_xxx macros to linker files even though they mean the same thing.
+ * Because this file is to include by both C/C++ files and linker files, we add
+ * these macros according to the others for consistency when they are missing
+ * in compile or link stage. */
+
+if (!isdefinedsymbol(APPLICATION_ADDR)) {
+    if (isdefinedsymbol(MBED_APP_START)) {
+        define symbol APPLICATION_ADDR      = MBED_APP_START;
+    } else {
+        define symbol APPLICATION_ADDR      = MBED_ROM_START;
+    }
+}
+
+if (!isdefinedsymbol(APPLICATION_SIZE)) {
+    if (isdefinedsymbol(MBED_APP_SIZE)) {
+        define symbol APPLICATION_SIZE      = MBED_APP_SIZE;
+    } else {
+        define symbol APPLICATION_SIZE      = MBED_ROM_SIZE;
+    }
+}
+
+if (!isdefinedsymbol(APPLICATION_RAM_ADDR)) {
+    if (isdefinedsymbol(MBED_RAM_APP_START)) {
+        define symbol APPLICATION_RAM_ADDR  = MBED_RAM_APP_START;
+    } else {
+        define symbol APPLICATION_RAM_ADDR  = MBED_RAM_START;
+    }
+}
+
+if (!isdefinedsymbol(APPLICATION_RAM_SIZE)) {
+    if (isdefinedsymbol(MBED_RAM_APP_SIZE)) {
+        define symbol APPLICATION_RAM_SIZE  = MBED_RAM_APP_SIZE;
+    } else {
+        define symbol APPLICATION_RAM_SIZE  = MBED_RAM_SIZE;
+    }
+}
+
+if (!isdefinedsymbol(MBED_APP_START)) {
+    define symbol MBED_APP_START            = APPLICATION_ADDR;
+}
+
+if (!isdefinedsymbol(MBED_APP_SIZE)) {
+    define symbol MBED_APP_SIZE             = APPLICATION_SIZE;
+}
+
+if (!isdefinedsymbol(MBED_RAM_APP_START)) {
+    define symbol MBED_RAM_APP_START        = APPLICATION_RAM_ADDR;
+}
+
+if (!isdefinedsymbol(MBED_RAM_APP_SIZE)) {
+    define symbol MBED_RAM_APP_SIZE         = APPLICATION_RAM_SIZE;
+}
+
+if (APPLICATION_ADDR != MBED_APP_START) {
+    error "APPLICATION_ADDR and MBED_APP_START are not the same!!!";
+}
+
+if (APPLICATION_SIZE != MBED_APP_SIZE) {
+    error "APPLICATION_SIZE and MBED_APP_SIZE are not the same!!!";
+}
+
+if (APPLICATION_RAM_ADDR != MBED_RAM_APP_START) {
+    error "APPLICATION_RAM_ADDR and MBED_RAM_APP_START are not the same!!!";
+}
+
+if (APPLICATION_RAM_SIZE != MBED_RAM_APP_SIZE) {
+    error "APPLICATION_RAM_SIZE and MBED_RAM_APP_SIZE are not the same!!!";
+}

targets/TARGET_NUVOTON/TARGET_M261/device/TOOLCHAIN_ARMC6/M261.sct

@@ -18,34 +18,29 @@
  * limitations under the License.
  */
 
-
-#if !defined(MBED_APP_START)
-  #define MBED_APP_START 0x00000000
-#endif
-
-#if !defined(MBED_APP_SIZE)
-  #define MBED_APP_SIZE 0x00080000
-#endif
+#include "../M261_mem.h"
 
 #if !defined(MBED_BOOT_STACK_SIZE)
   #define MBED_BOOT_STACK_SIZE      0x400
 #endif
 
+#define VECTOR_SIZE                 (4*(16 + 102))
+
 LR_IROM1 MBED_APP_START {
-  ER_IROM1 MBED_APP_START {  ; load address = execution address
+  ER_IROM1 +0 {  ; load address = execution address
    *(RESET, +First)
    *(InRoot$$Sections)
    .ANY (+RO)
   }
 
-  ARM_LIB_STACK 0x20000000 EMPTY MBED_BOOT_STACK_SIZE {
+  ARM_LIB_STACK MBED_RAM_APP_START EMPTY MBED_BOOT_STACK_SIZE {
   }
 
     /* Reserve for vectors
      *
      * Vector table base address is required to be 128-byte aligned at a minimum.
      * A PE might impose further restrictions on it. */
-  ER_IRAMVEC AlignExpr(+0, 128) EMPTY (4*(16 + 102)) {  ; Reserve for vectors
+  ER_IRAMVEC AlignExpr(+0, 128) EMPTY VECTOR_SIZE {  ; Reserve for vectors
   }
 
   RW_m_crash_data AlignExpr(+0, 0x100) EMPTY 0x100 { ; Reserve for crash data storage
@@ -55,8 +50,8 @@ LR_IROM1 MBED_APP_START {
    .ANY (+RW +ZI)
   }
 
-  ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (0x20000000 + 0x18000 - AlignExpr(ImageLimit(RW_IRAM1), 16)) {
+  ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_APP_START + MBED_RAM_APP_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) {
   }
 }
-ScatterAssert(LoadLimit(LR_IROM1) <= (MBED_APP_START + MBED_APP_SIZE))  ; 512 KB APROM
-ScatterAssert(ImageLimit(ARM_LIB_HEAP) <= 0x20018000)   ; 96 KB SRAM
+ScatterAssert(LoadLimit(LR_IROM1) <= (MBED_APP_START + MBED_APP_SIZE))
+ScatterAssert(ImageLimit(ARM_LIB_HEAP) <= (MBED_RAM_APP_START + MBED_RAM_APP_SIZE))

targets/TARGET_NUVOTON/TARGET_M261/device/TOOLCHAIN_GCC_ARM/M261.ld

@@ -20,13 +20,7 @@
  * Nuvoton M261 GCC linker script file
  */
 
-#if !defined(MBED_APP_START)
-  #define MBED_APP_START 0x00000000
-#endif
-
-#if !defined(MBED_APP_SIZE)
-  #define MBED_APP_SIZE 0x00080000
-#endif 
+#include "../M261_mem.h"
 
 #if !defined(MBED_BOOT_STACK_SIZE)
   #define MBED_BOOT_STACK_SIZE      0x400
@@ -39,7 +33,7 @@ MEMORY
 {
   VECTORS (rx)          : ORIGIN = MBED_APP_START, LENGTH = 0x00000400
   FLASH (rx)            : ORIGIN = MBED_APP_START + 0x400, LENGTH = MBED_APP_SIZE - 0x00000400
-  RAM_INTERN (rwx)      : ORIGIN = 0x20000000, LENGTH = 0x00018000 - 0x00000000
+  RAM_INTERN (rwx)      : ORIGIN = MBED_RAM_APP_START, LENGTH = MBED_RAM_APP_SIZE
 }
 
 /**

targets/TARGET_NUVOTON/TARGET_M261/device/TOOLCHAIN_IAR/M261.icf

@@ -19,18 +19,19 @@
 /*###ICF### Section handled by ICF editor, don't touch! ****/
 /*-Editor annotation file-*/
 /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
-if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x00000000; }
-if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x00080000; }
+
+include "../M261_mem.icf.h";
+
 if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { define symbol MBED_BOOT_STACK_SIZE = 0x400; }
 /*-Specials-*/
 define symbol __ICFEDIT_intvec_start__ = MBED_APP_START;
 /*-Memory Regions-*/
 define symbol __ICFEDIT_region_ROM_start__ = MBED_APP_START;
 define symbol __ICFEDIT_region_ROM_end__   = MBED_APP_START + MBED_APP_SIZE - 1;
-define symbol __ICFEDIT_region_IRAM_start__ = 0x20000000;
-define symbol __ICFEDIT_region_IRAM_end__   = 0x20017F00 - 1;
-define symbol __region_CRASH_DATA_RAM_start__  = 0x20017F00;
-define symbol __region_CRASH_DATA_RAM_end__  = 0x20018000 - 1;
+define symbol __ICFEDIT_region_IRAM_start__ = MBED_RAM_APP_START;
+define symbol __ICFEDIT_region_IRAM_end__   = MBED_RAM_APP_START + MBED_RAM_APP_SIZE - 0x100 - 1;
+define symbol __region_CRASH_DATA_RAM_start__  = MBED_RAM_APP_START + MBED_RAM_APP_SIZE - 0x100;
+define symbol __region_CRASH_DATA_RAM_end__  = MBED_RAM_APP_START + MBED_RAM_APP_SIZE - 1;
 /*-Sizes-*/
 define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE;
 define symbol __ICFEDIT_size_intvec__ = (4 * (16 + 102));

targets/TARGET_NUVOTON/TARGET_M261/flash_api.c

@@ -22,6 +22,7 @@
 #include <string.h>
 #include "flash_data.h"
 #include "mbed_critical.h"
+#include "M261_mem.h"
 
 // This is a flash algo binary blob. It is PIC (position independent code) that should be stored in RAM
 // NOTE: On ARMv7-M/ARMv8-M, instruction fetches are always little-endian.
@@ -82,16 +83,16 @@ static const flash_algo_t flash_algo_config = {
 };
 
 static const sector_info_t sectors_info[] = {
-    {0x0, 0x800},                                // (start, sector size)
+    {MBED_ROM_START, 0x800},                                // (start, sector size)
 };
 
 /* Secure flash */
 static const flash_target_config_t flash_target_config = {
     .page_size  = 4,                                        // 4 bytes
                                                             // Here page_size is program unit, which is different
                                                             // than FMC definition.
-    .flash_start = 0x0,
-    .flash_size = 0x80000,  // 512 KB
+    .flash_start = MBED_ROM_START,
+    .flash_size = MBED_ROM_SIZE,
     .sectors = sectors_info,
     .sector_info_count = sizeof(sectors_info) / sizeof(sector_info_t)
 };