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| 1 | +/* Copyright (c) 2017 mbed.org, MIT License |
| 2 | +* |
| 3 | +* Permission is hereby granted, free of charge, to any person obtaining a copy of this software |
| 4 | +* and associated documentation files (the "Software"), to deal in the Software without |
| 5 | +* restriction, including without limitation the rights to use, copy, modify, merge, publish, |
| 6 | +* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the |
| 7 | +* Software is furnished to do so, subject to the following conditions: |
| 8 | +* |
| 9 | +* The above copyright notice and this permission notice shall be included in all copies or |
| 10 | +* substantial portions of the Software. |
| 11 | +* |
| 12 | +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING |
| 13 | +* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
| 14 | +* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, |
| 15 | +* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| 16 | +* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. |
| 17 | +*/ |
| 18 | +#ifndef USBHALHOST_STM_H |
| 19 | +#define USBHALHOST_STM_H |
| 20 | + |
| 21 | +#if defined(TARGET_DISCO_F429ZI) |
| 22 | +#define USBHAL_IRQn OTG_HS_IRQn // Because GPIOB pins are used |
| 23 | +#else |
| 24 | +#define USBHAL_IRQn OTG_FS_IRQn |
| 25 | +#endif |
| 26 | + |
| 27 | +#define HCCA_SIZE sizeof(HCD_HandleTypeDef) |
| 28 | +#define ED_SIZE sizeof(HCED) |
| 29 | +#define TD_SIZE sizeof(HCTD) |
| 30 | + |
| 31 | +#define TOTAL_SIZE (HCCA_SIZE + (MAX_ENDPOINT * ED_SIZE) + (MAX_TD * TD_SIZE)) |
| 32 | + |
| 33 | +/* STM device FS have 11 channels (definition is for 60 channels) */ |
| 34 | +static volatile uint8_t usb_buf[TOTAL_SIZE]; |
| 35 | + |
| 36 | +typedef struct { |
| 37 | + /* store the request ongoing on each endpoit */ |
| 38 | + /* 1st field of structure avoid giving knowledge of all structure to |
| 39 | + * endpoint */ |
| 40 | + volatile uint32_t addr[MAX_ENDPOINT]; |
| 41 | + USBHALHost *inst; |
| 42 | + void (USBHALHost::*deviceConnected)(int hub, int port, bool lowSpeed, USBHostHub * hub_parent); |
| 43 | + void (USBHALHost::*deviceDisconnected)(int hub, int port, USBHostHub * hub_parent, volatile uint32_t addr); |
| 44 | + void (USBHALHost::*transferCompleted)(volatile uint32_t addr); |
| 45 | +} USBHALHost_Private_t; |
| 46 | + |
| 47 | +static gpio_t gpio_powerpin; |
| 48 | + |
| 49 | +// NUCLEO_64 boards |
| 50 | +#if defined(TARGET_NUCLEO_F401RE) || \ |
| 51 | + defined(TARGET_NUCLEO_F411RE) || \ |
| 52 | + defined(TARGET_NUCLEO_F446RE) || \ |
| 53 | + defined(TARGET_NUCLEO_L476RG) || \ |
| 54 | + defined(TARGET_NUCLEO_L486RG) |
| 55 | +#define USB_POWER_ON 0 |
| 56 | +#define USB_POWER_OFF 1 |
| 57 | +#define USB_POWERPIN_CONFIG {__HAL_RCC_GPIOC_CLK_ENABLE();gpio_init_out_ex(&gpio_powerpin, PC_0, USB_POWER_OFF);} |
| 58 | + |
| 59 | +// NUCLEO_144 boards |
| 60 | +#elif defined(TARGET_NUCLEO_F207ZG) || \ |
| 61 | + defined(TARGET_NUCLEO_F412ZG) || \ |
| 62 | + defined(TARGET_NUCLEO_F429ZI) || \ |
| 63 | + defined(TARGET_NUCLEO_F439ZI) || \ |
| 64 | + defined(TARGET_NUCLEO_F446ZE) || \ |
| 65 | + defined(TARGET_NUCLEO_F767ZI) || \ |
| 66 | + defined(TARGET_NUCLEO_F746ZG) || \ |
| 67 | + defined(TARGET_NUCLEO_F756ZG) || \ |
| 68 | + defined(TARGET_NUCLEO_F767ZI) |
| 69 | +#define USB_POWER_ON 1 |
| 70 | +#define USB_POWER_OFF 0 |
| 71 | +#define USB_POWERPIN_CONFIG {__HAL_RCC_GPIOG_CLK_ENABLE();gpio_init_out_ex(&gpio_powerpin, PG_6, USB_POWER_OFF);} |
| 72 | + |
| 73 | +#elif defined(TARGET_DISCO_F429ZI) |
| 74 | +#define USB_POWER_ON 0 |
| 75 | +#define USB_POWER_OFF 1 |
| 76 | +#define USB_POWERPIN_CONFIG {__HAL_RCC_GPIOC_CLK_ENABLE();gpio_init_out_ex(&gpio_powerpin, PC_4, USB_POWER_OFF);} |
| 77 | + |
| 78 | +#elif defined(TARGET_DISCO_F746NG) |
| 79 | +#define USB_POWER_ON 0 |
| 80 | +#define USB_POWER_OFF 1 |
| 81 | +#define USB_POWERPIN_CONFIG {__HAL_RCC_GPIOD_CLK_ENABLE();gpio_init_out_ex(&gpio_powerpin, PD_5, USB_POWER_OFF);} |
| 82 | + |
| 83 | +#elif defined(TARGET_DISCO_L475VG_IOT01A) |
| 84 | +#define USB_POWER_ON 0 |
| 85 | +#define USB_POWER_OFF 1 |
| 86 | +#define USB_POWERPIN_CONFIG {__HAL_RCC_GPIOD_CLK_ENABLE();gpio_init_out_ex(&gpio_powerpin, PD_12, USB_POWER_OFF);} |
| 87 | + |
| 88 | +#elif defined(TARGET_DISCO_L476VG) |
| 89 | +#define USB_POWER_ON 0 |
| 90 | +#define USB_POWER_OFF 1 |
| 91 | +#define USB_POWERPIN_CONFIG {__HAL_RCC_GPIOC_CLK_ENABLE();gpio_init_out_ex(&gpio_powerpin, PC_9, USB_POWER_OFF);} |
| 92 | + |
| 93 | +#else |
| 94 | +#error "USB power pin is not configured !" |
| 95 | +#endif |
| 96 | + |
| 97 | + |
| 98 | +void usb_vbus( uint8_t state) |
| 99 | +{ |
| 100 | + if (state == 0) { |
| 101 | + gpio_write(&gpio_powerpin, USB_POWER_OFF); |
| 102 | + } else { |
| 103 | + gpio_write(&gpio_powerpin, USB_POWER_ON); |
| 104 | + } |
| 105 | + wait(0.2); |
| 106 | +} |
| 107 | + |
| 108 | + |
| 109 | +USBHALHost::USBHALHost() |
| 110 | +{ |
| 111 | + instHost = this; |
| 112 | + HCD_HandleTypeDef *hhcd; |
| 113 | + USBHALHost_Private_t *HALPriv = new(USBHALHost_Private_t); |
| 114 | + |
| 115 | + memset(HALPriv, 0, sizeof(USBHALHost_Private_t)); |
| 116 | + memInit(); |
| 117 | + memset((void*)usb_hcca, 0, HCCA_SIZE); |
| 118 | + hhcd = (HCD_HandleTypeDef *)usb_hcca; |
| 119 | + hhcd->pData = (void*)HALPriv; |
| 120 | + |
| 121 | +#if defined(TARGET_DISCO_F429ZI) |
| 122 | + hhcd->Instance = USB_OTG_HS; |
| 123 | + hhcd->Init.speed = HCD_SPEED_HIGH; |
| 124 | +#else |
| 125 | + hhcd->Instance = USB_OTG_FS; |
| 126 | + hhcd->Init.speed = HCD_SPEED_FULL; |
| 127 | +#endif |
| 128 | + |
| 129 | + hhcd->Init.Host_channels = 11; |
| 130 | + hhcd->Init.dma_enable = 0; // for now failed with dma |
| 131 | + hhcd->Init.phy_itface = HCD_PHY_EMBEDDED; |
| 132 | + hhcd->Init.use_external_vbus = 1; |
| 133 | + |
| 134 | + HALPriv->inst = this; |
| 135 | + HALPriv->deviceConnected = &USBHALHost::deviceConnected; |
| 136 | + HALPriv->deviceDisconnected = &USBHALHost::deviceDisconnected; |
| 137 | + HALPriv->transferCompleted = &USBHALHost::transferCompleted; |
| 138 | + |
| 139 | + for (int i = 0; i < MAX_ENDPOINT; i++) { |
| 140 | + edBufAlloc[i] = false; |
| 141 | + HALPriv->addr[i]=(uint32_t)-1; |
| 142 | + } |
| 143 | + |
| 144 | + for (int i = 0; i < MAX_TD; i++) { |
| 145 | + tdBufAlloc[i] = false; |
| 146 | + } |
| 147 | + |
| 148 | + __HAL_RCC_PWR_CLK_ENABLE(); |
| 149 | + |
| 150 | +#ifdef TARGET_STM32L4 |
| 151 | + HAL_PWREx_EnableVddUSB(); |
| 152 | +#endif |
| 153 | + |
| 154 | + // Configure USB pins |
| 155 | +#if defined(TARGET_NUCLEO_F401RE) || \ |
| 156 | + defined(TARGET_NUCLEO_F411RE) || \ |
| 157 | + defined(TARGET_NUCLEO_F446RE) || \ |
| 158 | + defined(TARGET_NUCLEO_L476RG) || \ |
| 159 | + defined(TARGET_NUCLEO_L486RG) || \ |
| 160 | + defined(TARGET_NUCLEO_F207ZG) || \ |
| 161 | + defined(TARGET_NUCLEO_F412ZG) || \ |
| 162 | + defined(TARGET_NUCLEO_F429ZI) || \ |
| 163 | + defined(TARGET_NUCLEO_F439ZI) || \ |
| 164 | + defined(TARGET_NUCLEO_F446ZE) || \ |
| 165 | + defined(TARGET_NUCLEO_F767ZI) || \ |
| 166 | + defined(TARGET_NUCLEO_F746ZG) || \ |
| 167 | + defined(TARGET_NUCLEO_F756ZG) || \ |
| 168 | + defined(TARGET_NUCLEO_F767ZI) || \ |
| 169 | + defined(TARGET_DISCO_L475VG_IOT01A) |
| 170 | + __HAL_RCC_GPIOA_CLK_ENABLE(); |
| 171 | + pin_function(PA_11, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_FS)); // DM |
| 172 | + pin_function(PA_12, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_FS)); // DP |
| 173 | + pin_function(PA_10, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG_FS)); // ID |
| 174 | + pin_function(PA_9, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_FS)); // VBUS |
| 175 | + |
| 176 | +#elif defined(TARGET_DISCO_F429ZI) |
| 177 | + __HAL_RCC_GPIOB_CLK_ENABLE(); |
| 178 | + pin_function(PB_14, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_OTG_HS_FS)); // DM |
| 179 | + pin_function(PB_15, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_OTG_HS_FS)); // DP |
| 180 | + //pin_function(PB_12, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)); // ID |
| 181 | + //pin_function(PB_13, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_FS)); // VBUS |
| 182 | + gpio_t pin_vbus; |
| 183 | + gpio_init_in(&pin_vbus, PB_13); |
| 184 | + |
| 185 | +#elif defined(TARGET_DISCO_F746NG) |
| 186 | + __HAL_RCC_GPIOA_CLK_ENABLE(); |
| 187 | + pin_function(PA_11, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_FS)); // DM |
| 188 | + pin_function(PA_12, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_FS)); // DP |
| 189 | + pin_function(PA_10, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG_FS)); // ID |
| 190 | + __HAL_RCC_GPIOJ_CLK_ENABLE(); |
| 191 | + pin_function(PJ_12, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_FS)); // VBUS |
| 192 | + |
| 193 | +#elif defined(TARGET_DISCO_L476VG) |
| 194 | + __HAL_RCC_GPIOA_CLK_ENABLE(); |
| 195 | + pin_function(PA_11, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_FS)); // DM |
| 196 | + pin_function(PA_12, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_FS)); // DP |
| 197 | + pin_function(PA_10, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG_FS)); // ID |
| 198 | + pin_function(PC_11, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_FS)); // VBUS |
| 199 | + |
| 200 | +#else |
| 201 | +#error "USB pins are not configured !" |
| 202 | +#endif |
| 203 | + |
| 204 | + // Configure USB POWER pin |
| 205 | + USB_POWERPIN_CONFIG; |
| 206 | + |
| 207 | + // Enable clocks |
| 208 | + __HAL_RCC_SYSCFG_CLK_ENABLE(); |
| 209 | + |
| 210 | +#if defined(TARGET_DISCO_F429ZI) |
| 211 | + __HAL_RCC_USB_OTG_HS_CLK_ENABLE(); |
| 212 | +#else |
| 213 | + __HAL_RCC_USB_OTG_FS_CLK_ENABLE(); |
| 214 | +#endif |
| 215 | + |
| 216 | + // Set USB interrupt |
| 217 | + HAL_NVIC_SetPriority(USBHAL_IRQn, 5, 0); |
| 218 | + NVIC_SetVector(USBHAL_IRQn, (uint32_t)&_usbisr); |
| 219 | +} |
| 220 | + |
| 221 | +#endif // USBHALHOST_STM_H |
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