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gorazdadbridge
gorazd
authored and
adbridge
committed
ff_lpc546xx: add enet
fsl_phy.c/.h move to ../drivers to reuse it lwip: add hardware_init.c
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‎features/FEATURE_LWIP/lwip-interface/lwip-eth/arch/TARGET_NXP/TARGET_LPC546XX/TARGET_FF_LPC546XX/hardware_init_LPC546XX.c

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/* mbed Microcontroller Library
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* Copyright (c) 2017 ARM Limited
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include "fsl_iocon.h"
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#define IOCON_PIO_DIGITAL_EN 0x0100u /*!<@brief Enables digital function */
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#define IOCON_PIO_FUNC0 0x00u /*!<@brief Selects pin function 0 */
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#define IOCON_PIO_FUNC1 0x01u /*!<@brief Selects pin function 1 */
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#define IOCON_PIO_FUNC6 0x06u /*!<@brief Selects pin function 6 */
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#define IOCON_PIO_FUNC7 0x07u /*!<@brief Selects pin function 7 */
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#define IOCON_PIO_INPFILT_OFF 0x0200u /*!<@brief Input filter disabled */
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#define IOCON_PIO_INV_DI 0x00u /*!<@brief Input function is not inverted */
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#define IOCON_PIO_MODE_INACT 0x00u /*!<@brief No addition pin function */
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#define IOCON_PIO_MODE_PULLUP 0x20u /*!<@brief Selects pull-up function */
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#define IOCON_PIO_OPENDRAIN_DI 0x00u /*!<@brief Open drain is disabled */
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#define IOCON_PIO_SLEW_FAST 0x0400u /*!<@brief Fast mode, slew rate control is disabled */
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#define IOCON_PIO_SLEW_STANDARD 0x00u /*!<@brief Standard mode, output slew rate control is enabled */
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/*******************************************************************************
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* Code
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******************************************************************************/
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void lpc546xx_init_eth_hardware(void)
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{
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CLOCK_EnableClock(kCLOCK_InputMux);
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/* Enables the clock for the IOCON block. 0 = Disable; 1 = Enable.: 0x01u */
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CLOCK_EnableClock(kCLOCK_Iocon);
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const uint32_t port0_pin10_config = (/* Pin is configured as SWO */
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IOCON_PIO_FUNC6 |
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/* No addition pin function */
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IOCON_PIO_MODE_INACT |
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/* Input function is not inverted */
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IOCON_PIO_INV_DI |
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/* Enables digital function */
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IOCON_PIO_DIGITAL_EN |
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/* Input filter disabled */
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IOCON_PIO_INPFILT_OFF |
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/* Open drain is disabled */
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IOCON_PIO_OPENDRAIN_DI);
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/* PORT0 PIN10 (coords: P2) is configured as SWO */
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IOCON_PinMuxSet(IOCON, 0U, 10U, port0_pin10_config);
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const uint32_t port1_pin10_config = (/* Pin is configured as ENET_TXD1 */
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IOCON_PIO_FUNC1 /* IOCON_PIO_FUNC1 */ |
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/* No addition pin function */
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IOCON_PIO_MODE_INACT |
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/* Input function is not inverted */
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IOCON_PIO_INV_DI |
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/* Enables digital function */
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IOCON_PIO_DIGITAL_EN |
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/* Input filter disabled */
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IOCON_PIO_INPFILT_OFF |
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/* Standard mode, output slew rate control is enabled */
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IOCON_PIO_SLEW_STANDARD |
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/* Open drain is disabled */
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IOCON_PIO_OPENDRAIN_DI);
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/* PORT1 PIN10 (coords: E14) is configured as ENET_TXD1 */
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IOCON_PinMuxSet(IOCON, 1U, 10U, port1_pin10_config);
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const uint32_t port1_pin18_config = (/* Pin is configured as ENET_PHY_RST */
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IOCON_PIO_FUNC0 |
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/* Selects pull-up function */
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IOCON_PIO_MODE_PULLUP |
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/* Input function is not inverted */
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IOCON_PIO_INV_DI |
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/* Enables digital function */
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IOCON_PIO_DIGITAL_EN |
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/* Input filter disabled */
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IOCON_PIO_INPFILT_OFF |
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/* Standard mode, output slew rate control is enabled */
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IOCON_PIO_SLEW_STANDARD |
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/* Open drain is disabled */
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IOCON_PIO_OPENDRAIN_DI);
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/* PORT1 PIN18 (coords: H11) is configured as ENET_PHY_RST */
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IOCON_PinMuxSet(IOCON, 1U, 18U, port1_pin18_config);
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const uint32_t port1_pin14_config = (/* Pin is configured as ENET_RX_DV */
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IOCON_PIO_FUNC1 |
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/* No addition pin function */
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IOCON_PIO_MODE_INACT |
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/* Input function is not inverted */
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IOCON_PIO_INV_DI |
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/* Enables digital function */
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IOCON_PIO_DIGITAL_EN |
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/* Input filter disabled */
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IOCON_PIO_INPFILT_OFF |
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/* Standard mode, output slew rate control is enabled */
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IOCON_PIO_SLEW_STANDARD |
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/* Open drain is disabled */
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IOCON_PIO_OPENDRAIN_DI);
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/* PORT1 PIN14 (coords: B9) is configured as ENET_RX_DV */
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IOCON_PinMuxSet(IOCON, 1U, 14U, port1_pin14_config);
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const uint32_t port1_pin12_config = (/* Pin is configured as ENET_RXD0 */
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IOCON_PIO_FUNC1 |
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/* No addition pin function */
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IOCON_PIO_MODE_INACT |
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/* Input function is not inverted */
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IOCON_PIO_INV_DI |
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/* Enables digital function */
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IOCON_PIO_DIGITAL_EN |
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/* Input filter disabled */
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IOCON_PIO_INPFILT_OFF |
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/* Standard mode, output slew rate control is enabled */
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IOCON_PIO_SLEW_STANDARD |
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/* Open drain is disabled */
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IOCON_PIO_OPENDRAIN_DI);
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/* PORT1 PIN12 (coords: A9) is configured as ENET_RXD0 */
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IOCON_PinMuxSet(IOCON, 1U, 12U, port1_pin12_config);
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const uint32_t port1_pin13_config = (/* Pin is configured as ENET_RXD1 */
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IOCON_PIO_FUNC1 |
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/* No addition pin function */
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IOCON_PIO_MODE_INACT |
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/* Input function is not inverted */
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IOCON_PIO_INV_DI |
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/* Enables digital function */
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IOCON_PIO_DIGITAL_EN |
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/* Input filter disabled */
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IOCON_PIO_INPFILT_OFF |
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/* Standard mode, output slew rate control is enabled */
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IOCON_PIO_SLEW_STANDARD |
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/* Open drain is disabled */
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IOCON_PIO_OPENDRAIN_DI);
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/* PORT4 PIN12 (coords: A6) is configured as ENET_RXD1 */
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IOCON_PinMuxSet(IOCON, 1U, 13U, port1_pin13_config);
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const uint32_t port1_pin11_config = (/* Pin is configured as ENET_TX_EN */
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IOCON_PIO_FUNC1 |
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/* No addition pin function */
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IOCON_PIO_MODE_INACT |
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/* Input function is not inverted */
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IOCON_PIO_INV_DI |
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/* Enables digital function */
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IOCON_PIO_DIGITAL_EN |
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/* Input filter disabled */
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IOCON_PIO_INPFILT_OFF |
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/* Standard mode, output slew rate control is enabled */
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IOCON_PIO_SLEW_STANDARD |
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/* Open drain is disabled */
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IOCON_PIO_OPENDRAIN_DI);
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/* PORT4 PIN13 (coords: B6) is configured as ENET_TX_EN */
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IOCON_PinMuxSet(IOCON, 1U, 11U, port1_pin11_config);
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const uint32_t port1_pin15_config = (/* Pin is configured as ENET_RX_CLK */
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IOCON_PIO_FUNC1 |
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/* No addition pin function */
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IOCON_PIO_MODE_INACT |
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/* Input function is not inverted */
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IOCON_PIO_INV_DI |
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/* Enables digital function */
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IOCON_PIO_DIGITAL_EN |
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/* Input filter disabled */
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IOCON_PIO_INPFILT_OFF |
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/* Standard mode, output slew rate control is enabled */
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IOCON_PIO_SLEW_STANDARD |
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/* Open drain is disabled */
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IOCON_PIO_OPENDRAIN_DI);
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/* PORT4 PIN14 (coords: B5) is configured as ENET_RX_CLK */
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IOCON_PinMuxSet(IOCON, 1U, 15U, port1_pin15_config);
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const uint32_t port1_pin16_config = (/* Pin is configured as ENET_MDC */
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IOCON_PIO_FUNC1 |
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/* No addition pin function */
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IOCON_PIO_MODE_INACT |
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/* Input function is not inverted */
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IOCON_PIO_INV_DI |
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/* Enables digital function */
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IOCON_PIO_DIGITAL_EN |
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/* Input filter disabled */
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IOCON_PIO_INPFILT_OFF |
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/* Standard mode, output slew rate control is enabled */
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IOCON_PIO_SLEW_STANDARD |
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/* Open drain is disabled */
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IOCON_PIO_OPENDRAIN_DI);
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/* PORT4 PIN15 (coords: A4) is configured as ENET_MDC */
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IOCON_PinMuxSet(IOCON, 1U, 16U, port1_pin16_config);
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const uint32_t port1_pin17_config = (/* Pin is configured as ENET_MDIO */
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IOCON_PIO_FUNC1 |
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/* No addition pin function */
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IOCON_PIO_MODE_INACT |
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/* Input function is not inverted */
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IOCON_PIO_INV_DI |
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/* Enables digital function */
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IOCON_PIO_DIGITAL_EN |
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/* Input filter disabled */
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IOCON_PIO_INPFILT_OFF |
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/* Standard mode, output slew rate control is enabled */
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IOCON_PIO_SLEW_STANDARD |
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/* Open drain is disabled */
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IOCON_PIO_OPENDRAIN_DI);
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/* PORT4 PIN16 (coords: C4) is configured as ENET_MDIO */
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IOCON_PinMuxSet(IOCON, 1U, 17U, port1_pin17_config);
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const uint32_t port1_pin9_config = (/* Pin is configured as ENET_TXD0 */
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IOCON_PIO_FUNC1 |
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/* No addition pin function */
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IOCON_PIO_MODE_INACT |
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/* Input function is not inverted */
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IOCON_PIO_INV_DI |
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/* Enables digital function */
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IOCON_PIO_DIGITAL_EN |
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/* Input filter disabled */
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IOCON_PIO_INPFILT_OFF |
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/* Standard mode, output slew rate control is enabled */
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IOCON_PIO_SLEW_STANDARD |
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/* Open drain is disabled */
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IOCON_PIO_OPENDRAIN_DI);
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/* PORT4 PIN8 (coords: B14) is configured as ENET_TXD0 */
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IOCON_PinMuxSet(IOCON, 1U, 9U, port1_pin9_config);
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}

‎features/FEATURE_LWIP/lwip-interface/lwip-eth/arch/TARGET_NXP/TARGET_LPC546XX/harware_init_LPC546XX.c renamed to ‎features/FEATURE_LWIP/lwip-interface/lwip-eth/arch/TARGET_NXP/TARGET_LPC546XX/TARGET_LPCXpresso/hardware_init_LPC546XX.c

File renamed without changes.

‎targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/TARGET_LPCXpresso/fsl_phy.c renamed to ‎targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/drivers/fsl_phy.c

File renamed without changes.

‎targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/TARGET_LPCXpresso/fsl_phy.h renamed to ‎targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/drivers/fsl_phy.h

File renamed without changes.

‎targets/targets.json

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"FF_LPC546XX": {
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"inherits": ["LPC546XX"],
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"extra_labels_remove" : ["LPCXpresso"],
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"features_remove": ["LWIP"],
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"supported_form_factors": [""],
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"detect_code": ["8081"]
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},

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