Merge pull request #3282 from c1728p9/fix_nvic

Ensure isr cannot occur after NVIC_DisableIRQ

Author: 0xc0170

cmsis/core_cm0.h

@@ -589,6 +589,8 @@ __STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
 __STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn)
 {
   NVIC->ICER[0] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
+  __DSB();
+  __ISB();
 }
 
 

cmsis/core_cm0plus.h

@@ -703,6 +703,8 @@ __STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
 __STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn)
 {
   NVIC->ICER[0] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
+  __DSB();
+  __ISB();
 }
 
 

cmsis/core_cm3.h

@@ -1431,6 +1431,8 @@ __STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
 __STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
 {
   NVIC->ICER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
+  __DSB();
+  __ISB();
 }
 
 

cmsis/core_cm4.h

@@ -1597,6 +1597,8 @@ __STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
 __STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
 {
   NVIC->ICER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
+  __DSB();
+  __ISB();
 }
 
 

cmsis/core_cm7.h

@@ -1754,6 +1754,8 @@ __STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
 __STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn)
 {
   NVIC->ICER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
+  __DSB();
+  __ISB();
 }
 
 

cmsis/core_sc000.h

@@ -705,6 +705,8 @@ __STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
 __STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn)
 {
   NVIC->ICER[0] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
+  __DSB();
+  __ISB();
 }
 
 

cmsis/core_sc300.h

@@ -1376,6 +1376,8 @@ __STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
 __STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn)
 {
   NVIC->ICER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
+  __DSB();
+  __ISB();
 }