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romanjoeromanjoe
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Update GeneratedSource and system files for B0S2 using psoc6pdl 1.6.0.4172 RC2
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16 files changed

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-66
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16 files changed

+87
-66
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‎targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_064B0S2_4343W/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg.c

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* Description:
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* Wrapper function to initialize all generated code.
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* This file was automatically generated and should not be modified.
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* Tools Package 2.1.0.1260
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* psoc6pdl 1.6.0.3875
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* Tools Package 2.2.0.1747
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* psoc6pdl 1.6.0.4172
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* personalities_2.0 2.0.0.0
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* udd 1.2.0.300
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* udd 1.2.0.370
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*
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********************************************************************************
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* Copyright 2020 Cypress Semiconductor Corporation

‎targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_064B0S2_4343W/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg.h

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* Description:
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* Simple wrapper header containing all generated files.
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* This file was automatically generated and should not be modified.
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* Tools Package 2.1.0.1260
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* psoc6pdl 1.6.0.3875
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* Tools Package 2.2.0.1747
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* psoc6pdl 1.6.0.4172
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* personalities_2.0 2.0.0.0
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* udd 1.2.0.300
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* udd 1.2.0.370
1111
*
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********************************************************************************
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* Copyright 2020 Cypress Semiconductor Corporation

‎targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_064B0S2_4343W/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg.timestamp

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* Description:
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* Sentinel file for determining if generated source is up to date.
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* This file was automatically generated and should not be modified.
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* Tools Package 2.1.0.1260
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* psoc6pdl 1.6.0.3875
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* Tools Package 2.2.0.1747
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* psoc6pdl 1.6.0.4172
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* personalities_2.0 2.0.0.0
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* udd 1.2.0.300
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* udd 1.2.0.370
1111
*
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********************************************************************************
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* Copyright 2020 Cypress Semiconductor Corporation

‎targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_064B0S2_4343W/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_clocks.c

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* Description:
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* Clock configuration
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* This file was automatically generated and should not be modified.
7-
* Tools Package 2.1.0.1260
8-
* psoc6pdl 1.6.0.3875
7+
* Tools Package 2.2.0.1747
8+
* psoc6pdl 1.6.0.4172
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* personalities_2.0 2.0.0.0
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* udd 1.2.0.300
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* udd 1.2.0.370
1111
*
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********************************************************************************
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* Copyright 2020 Cypress Semiconductor Corporation

‎targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_064B0S2_4343W/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_clocks.h

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* Description:
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* Clock configuration
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* This file was automatically generated and should not be modified.
7-
* Tools Package 2.1.0.1260
8-
* psoc6pdl 1.6.0.3875
7+
* Tools Package 2.2.0.1747
8+
* psoc6pdl 1.6.0.4172
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* personalities_2.0 2.0.0.0
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* udd 1.2.0.300
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* udd 1.2.0.370
1111
*
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********************************************************************************
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* Copyright 2020 Cypress Semiconductor Corporation

‎targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_064B0S2_4343W/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_notices.h

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* Contains warnings and errors that occurred while generating code for the
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* design.
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* This file was automatically generated and should not be modified.
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* Tools Package 2.1.0.1260
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* psoc6pdl 1.6.0.3875
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* Tools Package 2.2.0.1747
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* psoc6pdl 1.6.0.4172
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* personalities_2.0 2.0.0.0
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* udd 1.2.0.300
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* udd 1.2.0.370
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*
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********************************************************************************
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* Copyright 2020 Cypress Semiconductor Corporation

‎targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_064B0S2_4343W/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_peripherals.c

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* Description:
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* Peripheral Hardware Block configuration
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* This file was automatically generated and should not be modified.
7-
* Tools Package 2.1.0.1260
8-
* psoc6pdl 1.6.0.3875
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* Tools Package 2.2.0.1747
8+
* psoc6pdl 1.6.0.4172
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* personalities_2.0 2.0.0.0
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* udd 1.2.0.300
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* udd 1.2.0.370
1111
*
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********************************************************************************
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* Copyright 2020 Cypress Semiconductor Corporation

‎targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_064B0S2_4343W/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_peripherals.h

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* Description:
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* Peripheral Hardware Block configuration
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* This file was automatically generated and should not be modified.
7-
* Tools Package 2.1.0.1260
8-
* psoc6pdl 1.6.0.3875
7+
* Tools Package 2.2.0.1747
8+
* psoc6pdl 1.6.0.4172
99
* personalities_2.0 2.0.0.0
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* udd 1.2.0.300
10+
* udd 1.2.0.370
1111
*
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********************************************************************************
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* Copyright 2020 Cypress Semiconductor Corporation

‎targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_064B0S2_4343W/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_pins.c

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* Description:
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* Pin configuration
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* This file was automatically generated and should not be modified.
7-
* Tools Package 2.1.0.1260
8-
* psoc6pdl 1.6.0.3875
7+
* Tools Package 2.2.0.1747
8+
* psoc6pdl 1.6.0.4172
99
* personalities_2.0 2.0.0.0
10-
* udd 1.2.0.300
10+
* udd 1.2.0.370
1111
*
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********************************************************************************
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* Copyright 2020 Cypress Semiconductor Corporation

‎targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_064B0S2_4343W/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_pins.h

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -4,10 +4,10 @@
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* Description:
55
* Pin configuration
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* This file was automatically generated and should not be modified.
7-
* Tools Package 2.1.0.1260
8-
* psoc6pdl 1.6.0.3875
7+
* Tools Package 2.2.0.1747
8+
* psoc6pdl 1.6.0.4172
99
* personalities_2.0 2.0.0.0
10-
* udd 1.2.0.300
10+
* udd 1.2.0.370
1111
*
1212
********************************************************************************
1313
* Copyright 2020 Cypress Semiconductor Corporation

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