Add ARM_MUSCA_A1 as a new target platform

Musca-A1 is a Cortex-M33 based target with security extension enabled.

- ARM_MUSCA_A1 is the non-secure target running mbed-os.
- ARM_MUSCA_A1_S is the secure target running TF-M.
- TF-M sources were imported and patched in previous commits.
- TF-M secure bootloader (McuBoot) for MUSCA_A1 is submitted by a pre-built binary.
- A post-build hook concatenates The secure and non-secure binaries,
  signs it and then concatenates the bootloader with the signed binary.

Author: Michael Schwarcz

features/storage/kvstore/conf/tdb_internal/mbed_lib.json

@@ -26,6 +26,10 @@
         "LPC55S69_S": {
             "internal_size": "0x8000",
             "internal_base_address": "0x00028000"
+        },
+       "ARM_MUSCA_A1_S": {
+            "internal_size": "0x8000",
+            "internal_base_address": "0x00420000"
         }
     }
 }

targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/PeripheralNames.h

@@ -0,0 +1,48 @@
+/* mbed Microcontroller Library
+ * Copyright (c) 2006-2018 Arm Limited
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef MBED_PERIPHERALNAMES_H
+#define MBED_PERIPHERALNAMES_H
+
+#include "cmsis.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef enum {
+    PORTNUM_0 = 0
+} PortName;
+
+typedef enum {
+    UART_0 = 0,
+    UART_1
+} UARTName;
+
+#define STDIO_UART_TX  UART1_TX
+#define STDIO_UART_RX  UART1_RX
+#define STDIO_UART     UART_1
+
+#define USBTX          STDIO_UART_TX
+#define USBRX          STDIO_UART_RX
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif

targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/PinNames.h

@@ -0,0 +1,112 @@
+/* mbed Microcontroller Library
+ * Copyright (c) 2006-2018 Arm Limited
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef MBED_PINNAMES_H
+#define MBED_PINNAMES_H
+
+#include "cmsis.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef enum {
+        PIN_INPUT,
+        PIN_OUTPUT
+} PinDirection;
+
+typedef enum {
+    PA0  = 0,
+    PA1  = 1,
+    PA2  = 2,
+    PA3  = 3,
+    PA4  = 4,
+    PA5  = 5,
+    PA6  = 6,
+    PA7  = 7,
+    PA8  = 8,
+    PA9  = 9,
+    PA10 = 10,
+    PA11 = 11,
+    PA12 = 12,
+    PA13 = 13,
+    PA14 = 14,
+    PA15 = 15,
+    PA16 = 16,
+    PA17 = 17,
+    PA18 = 18,
+    PA19 = 19,
+    PA20 = 20,
+    PA21 = 21,
+    PA22 = 22,
+    PA23 = 23,
+    PA24 = 24,
+    PA25 = 25,
+
+    /* Arduino Connector Namings */
+    D0 = PA0,
+    D1 = PA1,
+    D2 = PA2,
+    D3 = PA3,
+    D4 = PA4,
+    D5 = PA5,
+    D6 = PA6,
+    D7 = PA7,
+    D8 = PA8,
+    D9 = PA9,
+    D10 = PA10,
+    D11 = PA11,
+    D12 = PA12,
+    D13 = PA13,
+    D14 = PA14,
+    D15 = PA15,
+
+    /* UART pins */
+    UART0_RX = PA0,     /* Alternate Function - 1 */
+    UART0_TX = PA1,     /* Alternate Function - 1 */
+    UART1_RX = PA16,
+    UART1_TX = PA17,
+
+    LED1 = PA2,
+    LED2 = PA3,
+    LED3 = PA4,
+
+    /* Not connected */
+    NC = -1u,
+} PinName;
+
+typedef enum {
+    PRIMARY_FUNC = 0,
+    ALTERNATE_FUNC_1 = 1,
+    ALTERNATE_FUNC_2 = 2,
+    ALTERNATE_FUNC_3 = 3
+} PinFunction;
+
+typedef enum {
+    PullNone = 0,
+    PullUp,
+    PullDown,
+    PullDefault = PullNone
+} PinMode;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+

targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_NS/device/TOOLCHAIN_ARMC6/musca_ns.sct

@@ -0,0 +1,54 @@
+#! armclang --target=arm-arm-none-eabi -march=armv8-m.main -E -xc
+
+/*
+ * Copyright (c) 2018 ARM Limited
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "../../../partition/region_defs.h"
+#include "../cmsis_nvic.h"
+
+#if !defined(MBED_ROM_START)
+  #define MBED_ROM_START    NS_CODE_START                           // 0x000a0400
+#endif
+
+#if !defined(MBED_ROM_SIZE)
+  #define MBED_ROM_SIZE     NS_CODE_SIZE                            // 0x5f800
+#endif
+
+#if !defined(MBED_RAM_START)
+  #define MBED_RAM_START    NVIC_RAM_VECTOR_LIMIT                   // 0x20010170
+#endif
+
+#if !defined(MBED_RAM_SIZE)
+  #define MBED_RAM_SIZE     (NS_DATA_SIZE - NVIC_RAM_VECTOR_SIZE)   // 0xfe90
+#endif
+
+LR_CODE MBED_ROM_START NS_CODE_SIZE {
+    ER_CODE MBED_ROM_START NS_CODE_SIZE {
+        *.o (VECTOR +First)
+        .ANY (+RO)
+    }
+
+    RW_IRAM1 MBED_RAM_START MBED_RAM_SIZE {
+        * (+RW) ; RW data that gets copied from Flash to SRAM
+        * (+ZI) ; ZI data that gets initialised to zero in SRAM
+    }
+
+    HEAP_STACK +0 ALIGN 8 {
+        startup_cmsdk_musca_ns.o (HEAP, +First)
+        startup_cmsdk_musca_ns.o (STACK, +Last)
+    }
+}
+