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malibertymaliberty
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Merge pull request The-OpenROAD-Project#6860 from The-OpenROAD-Project-staging/modernize-nullptr
rcx/gpl: NULL to nullptr
2 parents 39a3658 + efe2f94 commit 79570c4

36 files changed

+603
-565
lines changed

‎src/gpl/src/nesterovBase.cpp‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1707,7 +1707,7 @@ void NesterovBase::initFillerGCells()
17071707
int64_t coreArea = pb_->die().coreArea();
17081708
whiteSpaceArea_ = coreArea - static_cast<int64_t>(pb_->nonPlaceInstsArea());
17091709

1710-
// if(pb_->group() == NULL) {
1710+
// if(pb_->group() == nullptr) {
17111711
// // nonPlaceInstsArea should not have density downscaling!!!
17121712
// whiteSpaceArea_ = coreArea - pb_->nonPlaceInstsArea();
17131713
// } else {

‎src/rcx/include/rcx/extMeasureRC.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -177,7 +177,7 @@ struct CouplingDimensionParams
177177
max_distance(0),
178178
coupling_distance(0),
179179
track_limit(10),
180-
dbgFP(NULL)
180+
dbgFP(nullptr)
181181
{
182182
}
183183

‎src/rcx/include/rcx/extRCap.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1016,7 +1016,7 @@ class extMeasure
10161016
double _peffR;
10171017
bool _skipResCalc = false;
10181018

1019-
GridTable* _search = NULL;
1019+
GridTable* _search = nullptr;
10201020
bool IsDebugNet1();
10211021
static int getMetIndexOverUnder(int met,
10221022
int mUnder,

‎src/rcx/include/rcx/extViaModel.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -78,7 +78,7 @@ class extViaModel
7878
}
7979
extViaModel()
8080
{
81-
_viaName = NULL;
81+
_viaName = nullptr;
8282
_res = 0;
8383
_cutCnt = 0;
8484
_dx = 0;

‎src/rcx/include/rcx/extprocess.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -217,7 +217,7 @@ class extMasterConductor
217217
double width,
218218
double X,
219219
double volt,
220-
extProcess* p = NULL);
220+
extProcess* p = nullptr);
221221
double writeRaphaelPoly3D(FILE* fp,
222222
uint wireNum,
223223
double width,

‎src/rcx/include/rcx/name.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -91,7 +91,7 @@ class NameTable
9191

9292
public:
9393
~NameTable();
94-
NameTable(uint n, char* zero = NULL);
94+
NameTable(uint n, char* zero = nullptr);
9595

9696
void writeDB(FILE* fp, char* nameType);
9797
bool readDB(FILE* fp);

‎src/rcx/src/ext.cpp‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -510,7 +510,7 @@ bool Ext::define_rcx_corners(const std::string& corner_list)
510510
bool Ext::rc_estimate(const std::string& ext_model_file,
511511
const std::string& out_file_prefix)
512512
{
513-
extRCModel* m = new extRCModel("MINTYPMAX", NULL);
513+
extRCModel* m = new extRCModel("MINTYPMAX", nullptr);
514514

515515
double version = 0.0;
516516
std::list<std::string> corner_list

‎src/rcx/src/extBenchDB.cpp‎

Lines changed: 13 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -84,7 +84,7 @@ uint extMain::GenExtRules(const char* rulesFileName)
8484
extMetRCTable* rcModel = extRulesModel->initCapTables(layerCnt, widthCnt);
8585

8686
AthPool<extDistRC>* rcPool = rcModel->getRCPool();
87-
extMeasure m(NULL);
87+
extMeasure m(nullptr);
8888
m._diagModel = 1;
8989
uint openWireNumber = 1;
9090

@@ -179,7 +179,7 @@ uint extMain::GenExtRules(const char* rulesFileName)
179179
m._overUnder = true;
180180
m._over = false;
181181

182-
} else if (strstr(overUnderToken, "o") != NULL) {
182+
} else if (strstr(overUnderToken, "o") != nullptr) {
183183
met = w->getInt(0, 1);
184184
overMet = w->getInt(1, 1);
185185
if (p->getFirstChar() == 'R') {
@@ -190,7 +190,7 @@ uint extMain::GenExtRules(const char* rulesFileName)
190190
m._underMet = overMet;
191191
m._overUnder = false;
192192
m._over = true;
193-
} else if (strstr(overUnderToken, "uu") != NULL) {
193+
} else if (strstr(overUnderToken, "uu") != nullptr) {
194194
met = w->getInt(0, 1);
195195
underMet = w->getInt(1, 1);
196196
diag = true;
@@ -199,7 +199,7 @@ uint extMain::GenExtRules(const char* rulesFileName)
199199
m._underMet = -1;
200200
m._overUnder = false;
201201
m._over = false;
202-
} else if (strstr(overUnderToken, "u") != NULL) {
202+
} else if (strstr(overUnderToken, "u") != nullptr) {
203203
met = w->getInt(0, 1);
204204
underMet = w->getInt(1, 1);
205205

@@ -279,7 +279,7 @@ uint extMain::GenExtRules(const char* rulesFileName)
279279
wLen,
280280
netName);
281281
}
282-
if (strstr(netName, "cntxM") != NULL)
282+
if (strstr(netName, "cntxM") != nullptr)
283283
continue;
284284

285285
extDistRC* rc = rcPool->alloc();
@@ -347,8 +347,8 @@ double extMain::getTotalCouplingCap(dbNet* net,
347347
dbCCSeg* cc = *ccitr;
348348
dbNet* srcNet = cc->getSourceCapNode()->getNet();
349349
dbNet* tgtNet = cc->getTargetCapNode()->getNet();
350-
if ((strstr(srcNet->getConstName(), filterNet) == NULL)
351-
&& (strstr(tgtNet->getConstName(), filterNet) == NULL))
350+
if ((strstr(srcNet->getConstName(), filterNet) == nullptr)
351+
&& (strstr(tgtNet->getConstName(), filterNet) == nullptr))
352352
continue;
353353

354354
cap += cc->getCapacitance(corner);
@@ -415,8 +415,8 @@ uint extMain::benchVerilog_assign(FILE* fp)
415415
for (itr = nets.begin(); itr != nets.end(); ++itr) {
416416
dbNet* net = *itr;
417417

418-
const char* bterm1 = NULL;
419-
const char* bterm2 = NULL;
418+
const char* bterm1 = nullptr;
419+
const char* bterm2 = nullptr;
420420
dbSet<dbBTerm> bterms = net->getBTerms();
421421
dbSet<dbBTerm>::iterator itr;
422422
for (itr = bterms.begin(); itr != bterms.end(); ++itr) {
@@ -474,11 +474,11 @@ uint extRCModel::benchDB_WS(extMainOptions* opt, extMeasure* measure)
474474
dbSet<dbTechNonDefaultRule> nd_rules = opt->_tech->getNonDefaultRules();
475475
dbSet<dbTechNonDefaultRule>::iterator nditr;
476476
dbTechLayerRule* tst_rule;
477-
// dbTechNonDefaultRule *wdth_rule = NULL;
477+
// dbTechNonDefaultRule *wdth_rule = nullptr;
478478

479479
for (nditr = nd_rules.begin(); nditr != nd_rules.end(); ++nditr) {
480480
tst_rule = (*nditr)->getLayerRule(layer);
481-
if (tst_rule == NULL)
481+
if (tst_rule == nullptr)
482482
continue;
483483

484484
double w = tst_rule->getWidth();
@@ -539,7 +539,7 @@ uint extRCModel::benchDB_WS(extMainOptions* opt, extMeasure* measure)
539539
measure->setTargetParams(w, s, 0.0, 0, 0, w2, s2);
540540
// measureResistance(measure, ro, top_widthR, bot_widthR, thicknessR);
541541
// measurePatternVar(measure, top_width, bot_width, thickness,
542-
// measure->_wireCnt, NULL);
542+
// measure->_wireCnt, nullptr);
543543
writeBenchWires_DB(measure);
544544

545545
cnt++;
@@ -586,7 +586,7 @@ uint extRCModel::benchDB_WS(extMainOptions* opt, extMeasure* measure)
586586
measure->setTargetParams(w,
587587
s, 0.0, t, h, w2, s2); measureResistance(measure, ro, top_widthR,
588588
bot_widthR, thicknessR); measurePatternVar(measure, top_width, bot_width,
589-
thickness, measure->_wireCnt, NULL);
589+
thickness, measure->_wireCnt, nullptr);
590590
591591
cnt++;
592592
}

‎src/rcx/src/extDebugPrint.cpp‎

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -486,7 +486,7 @@ void extDistRC::printDebug(const char* from,
486486
{
487487
if (rcUnit != nullptr) {
488488
debugPrint(
489-
logger_, RCX, "debug_net", 1, "[DistRC:C]\t--\trcUnit is not NULL");
489+
logger_, RCX, "debug_net", 1, "[DistRC:C]\t--\trcUnit is not nullptr");
490490
}
491491

492492
debugPrint(logger_,
@@ -504,7 +504,8 @@ void extDistRC::printDebug(const char* from,
504504
len,
505505
dist);
506506
if (rcUnit == nullptr) {
507-
debugPrint(logger_, RCX, "debug_net", 1, "[DistRC:C]\t--\trcUnit is NULL");
507+
debugPrint(
508+
logger_, RCX, "debug_net", 1, "[DistRC:C]\t--\trcUnit is nullptr");
508509
} else {
509510
rcUnit->printDebugRC(" ", logger_);
510511
}

‎src/rcx/src/extDefPatterns.cpp‎

Lines changed: 25 additions & 25 deletions
Original file line numberDiff line numberDiff line change
@@ -299,12 +299,12 @@ void extRulesPat::setMets(int underMet,
299299
{
300300
_under_layer = under_layer;
301301
_underMet = underMet;
302-
if (under_layer != NULL)
302+
if (under_layer != nullptr)
303303
_under_minSpaceCntx = getMinWidthSpacing(under_layer, _under_minWidthCntx);
304304

305305
_over_layer = over_layer;
306306
_overMet = overMet;
307-
if (over_layer != NULL)
307+
if (over_layer != nullptr)
308308
_over_minSpaceCntx = getMinWidthSpacing(over_layer, _over_minWidthCntx);
309309
}
310310
void extRulesPat::UpdateBBox()
@@ -776,7 +776,7 @@ uint extMain::DefWires(extMainOptions* opt)
776776

777777
dbChip* chip = dbChip::create(_db);
778778
assert(chip);
779-
_block = dbBlock::create(chip, opt->_name, NULL, '/');
779+
_block = dbBlock::create(chip, opt->_name, nullptr, '/');
780780
assert(_block);
781781

782782
_block->setBusDelimeters('[', ']');
@@ -843,7 +843,7 @@ uint extRCModel::OverRulePat(extMainOptions* opt,
843843
continue;
844844

845845
dbTechLayer* layer = opt->_tech->findRoutingLayer(met);
846-
if (layer == NULL)
846+
if (layer == nullptr)
847847
continue;
848848

849849
p->setLayerInfo(layer, met);
@@ -858,8 +858,8 @@ uint extRCModel::OverRulePat(extMainOptions* opt,
858858
continue;
859859

860860
dbTechLayer* under_layer
861-
= underMet > 0 ? opt->_tech->findRoutingLayer(underMet) : NULL;
862-
p->setMets(underMet, under_layer, -1, NULL);
861+
= underMet > 0 ? opt->_tech->findRoutingLayer(underMet) : nullptr;
862+
p->setMets(underMet, under_layer, -1, nullptr);
863863

864864
if (diag)
865865
cnt += p->CreatePatterns_diag();
@@ -911,7 +911,7 @@ uint extRCModel::UnderRulePat(extMainOptions* opt,
911911
continue;
912912

913913
dbTechLayer* layer = opt->_tech->findRoutingLayer(met);
914-
if (layer == NULL)
914+
if (layer == nullptr)
915915
continue;
916916

917917
p->setLayerInfo(layer, met);
@@ -925,10 +925,10 @@ uint extRCModel::UnderRulePat(extMainOptions* opt,
925925
continue;
926926

927927
dbTechLayer* over_layer = opt->_tech->findRoutingLayer(overMet);
928-
if (over_layer == NULL)
928+
if (over_layer == nullptr)
929929
continue;
930930

931-
p->setMets(-1, NULL, overMet, over_layer);
931+
p->setMets(-1, nullptr, overMet, over_layer);
932932

933933
if (!diag)
934934
cnt += p->CreatePatterns();
@@ -977,7 +977,7 @@ uint extRCModel::DiagUnderRulePat(extMainOptions* opt,
977977
continue;
978978

979979
dbTechLayer* layer = opt->_tech->findRoutingLayer(met);
980-
if (layer == NULL)
980+
if (layer == nullptr)
981981
continue;
982982

983983
p->setLayerInfo(layer, met);
@@ -991,10 +991,10 @@ uint extRCModel::DiagUnderRulePat(extMainOptions* opt,
991991
continue;
992992

993993
dbTechLayer* over_layer = opt->_tech->findRoutingLayer(overMet);
994-
if (over_layer == NULL)
994+
if (over_layer == nullptr)
995995
continue;
996996

997-
p->setMets(-1, NULL, overMet, over_layer);
997+
p->setMets(-1, nullptr, overMet, over_layer);
998998

999999
cnt += p->CreatePatterns_diag();
10001000
p->UpdateBBox();
@@ -1036,7 +1036,7 @@ uint extRCModel::OverUnderRulePat(extMainOptions* opt,
10361036
continue;
10371037

10381038
dbTechLayer* layer = opt->_tech->findRoutingLayer(met);
1039-
if (layer == NULL)
1039+
if (layer == nullptr)
10401040
continue;
10411041

10421042
p->setLayerInfo(layer, met);
@@ -1048,7 +1048,7 @@ uint extRCModel::OverUnderRulePat(extMainOptions* opt,
10481048
continue;
10491049

10501050
dbTechLayer* under_layer = opt->_tech->findRoutingLayer(underMet);
1051-
if (under_layer == NULL)
1051+
if (under_layer == nullptr)
10521052
continue;
10531053

10541054
for (uint overMet = met + 1; overMet <= _layerCnt; overMet++) {
@@ -1060,7 +1060,7 @@ uint extRCModel::OverUnderRulePat(extMainOptions* opt,
10601060
continue;
10611061

10621062
dbTechLayer* over_layer = opt->_tech->findRoutingLayer(overMet);
1063-
if (over_layer == NULL)
1063+
if (over_layer == nullptr)
10641064
continue;
10651065

10661066
p->setMets(underMet, under_layer, overMet, over_layer);
@@ -1196,21 +1196,21 @@ dbNet* extRulesPat::createNetSingleWire(const char* netName,
11961196
dbTechLayer* layer)
11971197
{
11981198
dbNet* net = dbNet::create(_block, netName);
1199-
if (net == NULL) {
1199+
if (net == nullptr) {
12001200
fprintf(stdout, "Cannot create net %s, duplicate\n", netName);
1201-
return NULL;
1201+
return nullptr;
12021202
}
12031203
net->setSigType(dbSigType::SIGNAL);
12041204
dbBTerm* loBTerm = extRulesPat::createBterm(
12051205
false, net, ll, ur, "_lo", layer, width, vertical, true /*input*/);
12061206
dbBTerm* hiBTerm = extRulesPat::createBterm(
12071207
true, net, ll, ur, "_hi", layer, width, vertical, false /*input*/);
1208-
if ((loBTerm == NULL) || (hiBTerm == NULL)) {
1208+
if ((loBTerm == nullptr) || (hiBTerm == nullptr)) {
12091209
dbNet::destroy(net);
12101210
fprintf(stdout,
12111211
"Cannot create net %s, because failed to create bterms\n",
12121212
netName);
1213-
return NULL;
1213+
return nullptr;
12141214
}
12151215

12161216
dbWireEncoder encoder;
@@ -1237,7 +1237,7 @@ dbTechLayerRule* extRulesPat::GetRule(int routingLayer, int width)
12371237
{
12381238
dbTechLayerRule*& rule = _rules[routingLayer][width];
12391239
1240-
if (rule != NULL)
1240+
if (rule != nullptr)
12411241
return rule;
12421242
12431243
// Create a non-default-rule for this width
@@ -1252,8 +1252,8 @@ dbTechLayerRule* extRulesPat::GetRule(int routingLayer, int width)
12521252
break;
12531253
}
12541254
1255-
if (nd_rule == NULL)
1256-
return NULL;
1255+
if (nd_rule == nullptr)
1256+
return nullptr;
12571257
fprintf(stdout, " NewRule %s,layer=%d width=%d\n", rule_name, routingLayer,
12581258
width); fflush(stdout);
12591259
// rule->getImpl()->getLogger()->info(utl::ODB,
@@ -1268,18 +1268,18 @@ width); fflush(stdout);
12681268
for (i = 1; i <= _tech->getRoutingLayerCount(); i++) {
12691269
dbTechLayer* layer = _routingLayers[i];
12701270
1271-
if (layer != NULL) {
1271+
if (layer != nullptr) {
12721272
dbTechLayerRule* lr = dbTechLayerRule::create(nd_rule, layer);
12731273
lr->setWidth(width);
12741274
lr->setSpacing(layer->getSpacing());
12751275
12761276
dbTechLayerRule*& r = _rules[i][width];
1277-
if (r == NULL)
1277+
if (r == nullptr)
12781278
r = lr;
12791279
}
12801280
}
12811281
1282-
assert(rule != NULL);
1282+
assert(rule != nullptr);
12831283
return rule;
12841284
}
12851285
*/

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