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kostorrkostorr
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Update CRU configuration for firmware v3.0.0
1 parent a3fa21b commit 0c6be65

12 files changed

+1815
-639
lines changed

‎src/Cru/Common.cxx‎

Lines changed: 39 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -225,6 +225,45 @@ uint32_t waitForBit(std::shared_ptr<Pda::PdaBar> pdaBar,uint32_t address, uint32
225225
return bit;
226226
}
227227

228+
void fpllref(std::vector<Link> linkList, std::shared_ptr<Pda::PdaBar> mPdaBar, uint32_t refClock, uint32_t baseAddress) //baseAddress = 0
229+
{
230+
if (baseAddress == 0){
231+
int prevWrapper = -1;
232+
int prevBank = -1;
233+
for (auto const& link: linkList) {
234+
if ((prevWrapper != link.wrapper) || (prevBank != link.bank)) {
235+
Cru::fpllref0(mPdaBar, getBankPllRegisterAddress(link.wrapper, link.bank), refClock);
236+
prevWrapper = link.wrapper;
237+
prevBank = link.bank;
238+
}
239+
}
240+
} else
241+
Cru::fpllref0(mPdaBar, baseAddress, refClock);
242+
}
243+
244+
void fpllcal(std::vector<Link> linkList, std::shared_ptr<Pda::PdaBar> mPdaBar, uint32_t baseAddress, bool configCompensation) //baseAddress = 0, configCompensation = true
245+
{
246+
if (baseAddress == 0){
247+
int prevWrapper = -1;
248+
int prevBank = -1;
249+
for (auto const& link: linkList) {
250+
if ((prevWrapper != link.wrapper) || (prevBank!= link.bank)) {
251+
Cru::fpllcal0(mPdaBar, getBankPllRegisterAddress(link.wrapper, link.bank), configCompensation);
252+
prevWrapper = link.wrapper;
253+
prevBank = link.bank;
254+
}
255+
}
256+
} else
257+
Cru::fpllcal0(mPdaBar, baseAddress, configCompensation);
258+
}
259+
260+
uint32_t getBankPllRegisterAddress(int wrapper, int bank)
261+
{
262+
return Cru::getWrapperBaseAddress(wrapper) +
263+
Cru::Registers::GBT_WRAPPER_BANK_OFFSET.address * (bank + 1) +
264+
Cru::Registers::GBT_BANK_FPLL.address;
265+
}
266+
228267

229268
} // namespace Cru
230269
} // namespace roc

‎src/Cru/Common.h‎

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -73,6 +73,9 @@ void txcal0(std::shared_ptr<Pda::PdaBar> pdaBar, uint32_t baseAddress);
7373
void rxcal0(std::shared_ptr<Pda::PdaBar> pdaBar, uint32_t baseAddress);
7474
void fpllref0(std::shared_ptr<Pda::PdaBar> pdaBar, uint32_t baseAddress, uint32_t refClock);
7575
void fpllcal0(std::shared_ptr<Pda::PdaBar> pdaBar, uint32_t baseAddress, bool configCompensation=true);
76+
void fpllref(std::vector<Link> linkList, std::shared_ptr<Pda::PdaBar> mPdaBar, uint32_t refClock, uint32_t baseAddress=0);
77+
void fpllcal(std::vector<Link> linkList, std::shared_ptr<Pda::PdaBar> mPdaBar, uint32_t baseAddress=0, bool configCompensation=true);
78+
uint32_t getBankPllRegisterAddress(int wrapper, int bank);
7679
uint32_t waitForBit(std::shared_ptr<Pda::PdaBar> pdaBar, uint32_t address, uint32_t position, uint32_t value);
7780

7881
} // namespace Cru

‎src/Cru/CruBar.cxx‎

Lines changed: 8 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -466,15 +466,18 @@ void CruBar::configure()
466466

467467
/* TTC */
468468
Ttc ttc = Ttc(mPdaBar);
469-
470-
log("Calibrating TTC");
471-
ttc.calibrateTtc();
472469

473470
log("Setting the clock");
474471
ttc.setClock(mClock);
472+
473+
log("Calibrating TTC");
474+
ttc.calibrateTtc();
475+
475476
if (ponUpstream) {
476-
ttc.resetFpll();
477-
ttc.configurePonTx(onuAddress);
477+
//ttc.resetFpll();
478+
if(!ttc.configurePonTx(onuAddress)) {
479+
BOOST_THROW_EXCEPTION(Exception() << ErrorInfo::Message("PON TX fPLL phase scan failed."));
480+
}
478481
}
479482

480483
log("Setting downstream data");

‎src/Cru/DatapathWrapper.cxx‎

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -101,11 +101,10 @@ void DatapathWrapper::setPacketArbitration(int wrapperCount, int arbitrationMode
101101
}
102102

103103
/// Set Flow Control
104-
void DatapathWrapper::setFlowControl(int wrapper, int allowReject, int forceReject)
104+
void DatapathWrapper::setFlowControl(int wrapper, int allowReject)
105105
{
106106
uint32_t value = 0;
107107
value |= (allowReject << 0);
108-
value |= (forceReject << 4);
109108

110109
uint32_t address = getDatapathWrapperBaseAddress(wrapper) +
111110
Cru::Registers::FLOW_CONTROL_OFFSET.address +

‎src/Cru/DatapathWrapper.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -36,7 +36,7 @@ class DatapathWrapper{
3636
void setDatapathMode(Link link, uint32_t mode);
3737
DatapathMode::type getDatapathMode(Link link);
3838
void setPacketArbitration(int wrapperCount, int arbitrationMode=0);
39-
void setFlowControl(int wrapper, int allowReject=0, int forceReject=0);
39+
void setFlowControl(int wrapper, int allowReject=0);
4040

4141
private:
4242
uint32_t getDatapathWrapperBaseAddress(int wrapper);

‎src/Cru/Gbt.cxx‎

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -70,8 +70,9 @@ void Gbt::setLoopback(Link link, uint32_t enabled)
7070

7171
void Gbt::calibrateGbt()
7272
{
73-
atxcal();
74-
cdrref(0);
73+
Cru::fpllref(mLinkList, mPdaBar, 2);
74+
Cru::fpllcal(mLinkList, mPdaBar);
75+
cdrref(2);
7576
txcal();
7677
rxcal();
7778
}

‎src/Cru/Ttc.cxx‎

Lines changed: 57 additions & 50 deletions
Original file line numberDiff line numberDiff line change
@@ -18,8 +18,10 @@
1818
#include "Constants.h"
1919
#include "I2c.h"
2020
#include "Ttc.h"
21-
#include "register_maps/Regmap_default_PLL2_40mhz_input_240mhz_output.h"
22-
#include "register_maps/Regmap_PLL2_240mhz_input_240mhz_output.h"
21+
#include "register_maps/Si5345-RevD_local_pll1_zdb-Registers.h"
22+
#include "register_maps/Si5345-RevD_local_pll2_zdb-Registers.h"
23+
#include "register_maps/Si5345-RevD_ttc_pll1_zdb-Registers.h"
24+
#include "register_maps/Si5345-RevD_ttc_pll2_zdb-Registers.h"
2325
#include "register_maps/Si5344-RevD-TFC_40-Registers.h"
2426

2527
namespace AliceO2 {
@@ -45,21 +47,29 @@ void Ttc::configurePlls(uint32_t clock)
4547

4648
uint32_t chipAddress = 0x68; //fixed address
4749

50+
std::vector<std::pair<uint32_t, uint32_t>> registerMap1;
4851
std::vector<std::pair<uint32_t, uint32_t>> registerMap2;
4952
std::vector<std::pair<uint32_t, uint32_t>> registerMap3 = getSi5344RegisterMap();
5053

5154
if (clock == Cru::CLOCK_LOCAL) {
52-
registerMap2 = getLocalClockRegisterMap();
55+
registerMap1 = getLocalClockPll1RegisterMap();
56+
registerMap2 = getLocalClockPll2RegisterMap();
5357
} else {
58+
setRefGen(0);
5459
setRefGen(1);
55-
registerMap2 = getTtcClockRegisterMap();
60+
registerMap1 = getTtcClockPll1RegisterMap();
61+
registerMap2 = getTtcClockPll1RegisterMap();
5662
}
5763

64+
I2c p1 = I2c(Cru::Registers::SI5345_1.address, chipAddress, mPdaBar, registerMap1);
5865
I2c p2 = I2c(Cru::Registers::SI5345_2.address, chipAddress, mPdaBar, registerMap2);
5966
I2c p3 = I2c(Cru::Registers::SI5344.address, chipAddress, mPdaBar, registerMap3);
6067

68+
p1.configurePll();
6169
p2.configurePll();
6270
p3.configurePll();
71+
72+
std::this_thread::sleep_for(std::chrono::seconds(2));
6373
}
6474

6575
void Ttc::setRefGen(uint32_t refGenId, int frequency)
@@ -95,15 +105,45 @@ void Ttc::resetFpll()
95105
mPdaBar->modifyRegister(Cru::Registers::CLOCK_CONTROL.index, 24, 1, 0x0);
96106
}
97107

98-
void Ttc::configurePonTx(uint32_t onuAddress)
108+
bool Ttc::configurePonTx(uint32_t onuAddress)
99109
{
110+
// Disable automatic phase scan
111+
mPdaBar->writeRegister(Cru::Registers::CLOCK_PLL_CONTROL_ONU.index, 0x1);
100112

101-
Cru::fpllref0(mPdaBar, Cru::Registers::CLOCK_ONU_FPLL.address, 0x1);
102-
Cru::fpllcal0(mPdaBar, Cru::Registers::CLOCK_ONU_FPLL.address, false);
113+
// Perform phase scan manually
114+
int count = 0;
115+
bool lowSeen = false;
116+
int minimumSteps = 22;
117+
uint32_t onuStatus;
118+
int i;
119+
for(i=0; i<256; i++) {
120+
mPdaBar->writeRegister(Cru::Registers::CLOCK_PLL_CONTROL_ONU.index, 0x00300000);
121+
std::this_thread::sleep_for(std::chrono::milliseconds(10));
122+
mPdaBar->writeRegister(Cru::Registers::CLOCK_PLL_CONTROL_ONU.index, 0x00200000);
123+
std::this_thread::sleep_for(std::chrono::milliseconds(10));
124+
onuStatus = mPdaBar->readRegister((Cru::Registers::ONU_USER_LOGIC.address + 0xC)/4);
125+
if (onuStatus == 0xff || onuStatus == 0x7f) {
126+
count++;
127+
} else if (onuStatus == 0xf5 || onuStatus == 0xfd) {
128+
count = 0;
129+
lowSeen = true;
130+
} else {
131+
count = 0;
132+
}
103133

104-
mPdaBar->writeRegister(Cru::Registers::CLOCK_PLL_CONTROL_ONU.index, 0x1);
134+
if (i > minimumSteps && lowSeen && count==1) {
135+
break;
136+
}
137+
}
138+
139+
if (i==256) {
140+
return false;
141+
}
142+
143+
// Assign ONU address
105144
mPdaBar->modifyRegister(Cru::Registers::ONU_USER_LOGIC.index, 1, 8, onuAddress);
106145

146+
return true;
107147
//TODO: Show calibration status..
108148
}
109149

@@ -113,12 +153,18 @@ void Ttc::calibrateTtc()
113153
uint32_t sel0 = mPdaBar->readRegister((Cru::Registers::PON_WRAPPER_PLL.address + 0x044c)/4);
114154
mPdaBar->writeRegister((Cru::Registers::PON_WRAPPER_PLL.address + 0x0448)/4, sel0);
115155

156+
// Calibrate PON RX
157+
Cru::rxcal0(mPdaBar, Cru::Registers::PON_WRAPPER_TX.address);
158+
159+
// Calibrate fPLL
160+
Cru::fpllref0(mPdaBar, Cru::Registers::CLOCK_ONU_FPLL.address, 1); //selecte refclk 1
161+
Cru::fpllcal0(mPdaBar, Cru::Registers::CLOCK_ONU_FPLL.address, false);
162+
116163
// Calibrate ATX PLL
117164
Cru::atxcal0(mPdaBar, Cru::Registers::PON_WRAPPER_PLL.address);
118165

119-
//Calibrate PON TX/RX
166+
//Calibrate PON TX
120167
Cru::txcal0(mPdaBar, Cru::Registers::PON_WRAPPER_TX.address);
121-
Cru::rxcal0(mPdaBar, Cru::Registers::PON_WRAPPER_TX.address);
122168

123169
std::this_thread::sleep_for(std::chrono::seconds(2));
124170
}
@@ -143,46 +189,7 @@ uint32_t Ttc::getPllClock()
143189
}
144190

145191
// Currently unused by RoC
146-
/*void Ttc::fpllref(uint32_t refClock, uint32_t baseAddress) //baseAddress = 0
147-
{
148-
if (baseAddress == 0){
149-
int prevWrapper = -1;
150-
int prevBank = -1;
151-
for (auto const& link: mLinkList) {
152-
if ((prevWrapper != link.wrapper) || (prevBank != link.bank)) {
153-
Cru::fpllref0(mPdaBar, getBankPllRegisterAddress(link.wrapper, link.bank), refClock);
154-
prevWrapper = link.wrapper;
155-
prevBank = link.bank;
156-
}
157-
}
158-
} else
159-
Cru::fpllref0(mPdaBar, baseAddress, refClock);
160-
}
161-
162-
void Ttc::fpllcal(uint32_t baseAddress, bool configCompensation) //baseAddress = 0, configCompensation = true
163-
{
164-
if (baseAddress == 0){
165-
int prevWrapper = -1;
166-
int prevBank = -1;
167-
for (auto const& link: mLinkList) {
168-
if ((prevWrapper != link.wrapper) || (prevBank!= link.bank)) {
169-
Cru::fpllcal0(mPdaBar, getBankPllRegisterAddress(link.wrapper, link.bank), configCompensation);
170-
prevWrapper = link.wrapper;
171-
prevBank = link.bank;
172-
}
173-
}
174-
} else
175-
Cru::fpllcal0(mPdaBar, baseAddress, configCompensation);
176-
}
177-
178-
uint32_t Ttc::getBankPllRegisterAddress(int wrapper, int bank)
179-
{
180-
return Cru::getWrapperBaseAddress(wrapper) +
181-
Cru::Registers::GBT_WRAPPER_BANK_OFFSET.address * (bank + 1) +
182-
Cru::Registers::GBT_BANK_FPLL.address;
183-
}
184-
185-
void Ttc::atxref(uint32_t refClock)
192+
/*void Ttc::atxref(uint32_t refClock)
186193
{
187194
//Was not used... (just for info purposes)
188195
//uint32_t reg112 = readRegister(getAtxPllRegisterAddress(0, 0x112)/4); //get in gbt for now

‎src/Cru/Ttc.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -18,7 +18,7 @@ class Ttc {
1818
void calibrateTtc();
1919
void setClock(uint32_t clock, bool devkit=false);
2020
void resetFpll();
21-
void configurePonTx(uint32_t onuAddress);
21+
bool configurePonTx(uint32_t onuAddress);
2222
void selectDownstreamData(uint32_t downstreamData);
2323
uint32_t getPllClock();
2424
uint32_t getDownstreamData();

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