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kostorrkostorr
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[crorc] Improve reset sequence
1 parent edfcc26 commit 6193ad4

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9 files changed

+216
-176
lines changed

9 files changed

+216
-176
lines changed

‎src/CommandLineUtilities/ProgramReset.cxx‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -46,6 +46,7 @@ class ProgramReset : public Program
4646

4747
auto params = AliceO2::roc::Parameters::makeParameters(cardId, channelNumber);
4848
params.setBufferParameters(AliceO2::roc::buffer_parameters::Null());
49+
params.setFirmwareCheckEnabled(false);
4950
auto channel = AliceO2::roc::ChannelFactory().getDmaChannel(params);
5051
channel->resetChannel(resetLevel);
5152
}

‎src/Crorc/Constants.h‎

Lines changed: 30 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -129,10 +129,6 @@ constexpr int CLEAR_RORC_ERROR = 0x00000008; ///< bit 3
129129
namespace CcsrCommand
130130
{
131131
constexpr int RESET_DIU = 0x00000001; ///< bit 0
132-
constexpr int CLEAR_FIFOS = 0x00000002; ///< bit 1
133-
constexpr int CLEAR_RXFF = 0x00000004; ///< bit 2
134-
constexpr int CLEAR_TXFF = 0x00000008; ///< bit 3
135-
constexpr int CLEAR_ERROR = 0x00000010; ///< bit 4
136132
constexpr int CLEAR_COUNTERS = 0x00000020; ///< bit 5
137133
constexpr int DATA_TX_ON_OFF = 0x00000100; ///< bit 8
138134
constexpr int DATA_RX_ON_OFF = 0x00000200; ///< bit 9
@@ -170,9 +166,7 @@ constexpr int DIU = 4; ///< reset DIU
170166
constexpr int SIU = 8; ///< reset SIU
171167
constexpr int LINK_UP = 16; ///< init link
172168
constexpr int FEE = 32; ///< reset Front-End
173-
constexpr int FIFOS = 64; ///< reset RORC's FIFOS (not Free FIFO)
174169
constexpr int ERROR = 128; ///< reset RORC's error register
175-
constexpr int COUNTERS = 256; ///< reset RORC's event number counters
176170
constexpr int ALL = 0x000001FF; ///< bits 8-0
177171
} // namespace Reset
178172

@@ -365,17 +359,45 @@ static constexpr Register I2C_CMD(0x000000D0);
365359
static constexpr Register CFG_CONTROL(0x000001f0);
366360

367361
// Register that contains the firmware hash
368-
static constexpr Register FIRMWARE_HASH(0x0000019C);
362+
static constexpr Register FIRMWARE_HASH(0x0000019c);
363+
364+
// CRORC Control & Status Register
365+
static constexpr Register CRORC_CSR(0x00000000);
366+
367+
// CHANNEL Control & Status Register
368+
// [9] -> data receive ON / OFF
369+
// [23] -> FIFO NOT EMPTY
370+
static constexpr Register CHAN_CSR(0x00000010);
371+
static constexpr uint32_t DATA_RX_ON_OFF(0x00000200);
372+
static constexpr uint32_t RXSTAT_NOT_EMPTY(0x00800000);
369373

370374
// Channel Control & Status Register
371-
static constexpr Register C_CSR(0x00000010);
375+
// [1] -> CRORC
376+
// [2] -> CHANNEL (can be used together - e.g. 0x3)
377+
static constexpr Register CHANNEL_CSR(0x00000010);
378+
static constexpr uint32_t CRORC_RESET(0x00000003);
379+
380+
// Channel Receive Report Base Address
381+
static constexpr Register CHANNEL_RRBAR(0x00000034);
382+
// Channel Receive Report Base Address Extension
383+
static constexpr Register CHANNEL_RRBARX(0x00000084);
384+
385+
// Register to send DDL commands
386+
static constexpr Register DDL_COMMAND(0x00000018); //TODO: Find a better name
387+
static constexpr Register DDL_STATUS(0x0000001C);
388+
static constexpr uint32_t SIU_RESET(0x000000f1);
372389

373390
// At bit 13
374391
static constexpr uint32_t LINK_DOWN(0x00002000);
375392

393+
// Registers containing Optical Power information
376394
static constexpr IntervalRegister OPT_POWER_QSFP0(0x00000144, 0x4);
377395
static constexpr IntervalRegister OPT_POWER_QSFP1(0x00000158, 0x4);
378396

397+
// Registers for RX FIFO configuration
398+
static constexpr Register RX_FIFO_ADDR_LOW(0x00000038);
399+
static constexpr Register RX_FIFO_ADDR_HIGH(0x0000003c);
400+
static constexpr Register RX_FIFO_ADDR_EXT(0x00000080);
379401
} // namespace Registers
380402
} //namespace Crorc
381403

‎src/Crorc/Crorc.cxx‎

Lines changed: 35 additions & 44 deletions
Original file line numberDiff line numberDiff line change
@@ -499,15 +499,16 @@ StWord Crorc::ddlReadCTSTW(int transid, int destination, long long int time)
499499
return stw;
500500
}
501501

502-
StWord Crorc::ddlReadSiu(int transid, long long int time)
502+
//TODO: Transid could be set automatically here
503+
StWord Crorc::ddlReadSiu(int transid, long long int time) //TODO: This to be kept like this -> clean wherever possible
503504
{
504505
// prepare and send DDL command
505506
int destination = Ddl::Destination::SIU;
506-
ddlSendCommand(destination, Rorc::RandCIFST, transid, 0, time);
507+
ddlSendCommand(destination, Rorc::RandCIFST, transid, 0, time); //TODO: A bar write
507508

508509
// read and check the answer
509-
ddlWaitStatus(time);
510-
StWord stw = ddlReadStatus();
510+
ddlWaitStatus(time); //TODO: Keep reading to check the status
511+
StWord stw = ddlReadStatus(); //TODO: Read once
511512
if (stw.part.code != Rorc::IFSTW || stw.part.trid != transid || stw.part.dest != destination) {
512513
BOOST_THROW_EXCEPTION(
513514
Exception() << ErrorInfo::Message("Unexpected SIU STW (not IFSTW)")
@@ -516,7 +517,7 @@ StWord Crorc::ddlReadSiu(int transid, long long int time)
516517
}
517518

518519
StWord ret = stw;
519-
stw = ddlReadStatus();
520+
stw = ddlReadStatus(); //TODO: Read twice
520521
if ((stw.part.code != Rorc::CTSTW && stw.part.code != Rorc::ILCMD && stw.part.code != Rorc::CTSTW_TO) || stw.part.trid != transid || stw.part.dest != destination) {
521522
BOOST_THROW_EXCEPTION(
522523
Exception() << ErrorInfo::Message("Unexpected SIU STW (not CTSTW)")
@@ -698,18 +699,6 @@ void Crorc::resetCommand(int option, const DiuConfig& diuConfig)
698699
if (option & Rorc::Reset::DIU) {
699700
command |= Rorc::CcsrCommand::RESET_DIU;
700701
}
701-
if (option & Rorc::Reset::FF) {
702-
command |= Rorc::CcsrCommand::CLEAR_RXFF | Rorc::CcsrCommand::CLEAR_TXFF;
703-
}
704-
if (option & Rorc::Reset::FIFOS) {
705-
command |= Rorc::CcsrCommand::CLEAR_FIFOS;
706-
}
707-
if (option & Rorc::Reset::ERROR) {
708-
command |= Rorc::CcsrCommand::CLEAR_ERROR;
709-
}
710-
if (option & Rorc::Reset::COUNTERS) {
711-
command |= Rorc::CcsrCommand::CLEAR_COUNTERS;
712-
}
713702
if (command) {
714703
write(Rorc::C_CSR, (uint32_t)command);
715704
}
@@ -724,41 +713,40 @@ void Crorc::resetCommand(int option, const DiuConfig& diuConfig)
724713
}
725714
}
726715

727-
/// Try to empty D-RORC's data FIFOs
728-
/// \param timeoutMicroseconds Time-out value in usecs
729-
void Crorc::emptyDataFifos(int timeoutMicroseconds)
716+
void Crorc::armDdl(/*int resetMask, const DiuConfig& diuConfig*/)
730717
{
731-
auto endTime = chrono::steady_clock::now() + chrono::microseconds(timeoutMicroseconds);
718+
//auto reset = [&](uint32_t command) { resetCommand(command, diuConfig); };
732719

733-
while (chrono::steady_clock::now() < endTime) {
734-
if (!checkRxData()) {
735-
return;
736-
}
737-
write(Rorc::C_CSR, (uint32_t)Rorc::CcsrCommand::CLEAR_FIFOS);
738-
}
739-
740-
if (checkRxData()) {
741-
BOOST_THROW_EXCEPTION(TimeoutException() << ErrorInfo::Message("Timed out emptying data FIFOs"));
742-
}
743-
}
744-
745-
void Crorc::armDdl(int resetMask, const DiuConfig& diuConfig)
746-
{
747-
auto reset = [&](uint32_t command) { resetCommand(command, diuConfig); };
748-
749-
if (resetMask & Rorc::Reset::FEE) {
720+
/* if (resetMask & Rorc::Reset::FEE) { //TODO: Remove
750721
BOOST_THROW_EXCEPTION(Exception() << ErrorInfo::Message("Command not allowed"));
751722
}
752-
if (resetMask & Rorc::Reset::SIU) {
723+
if (resetMask & Rorc::Reset::SIU) { //TODO: Remove
753724
ddlResetSiu(3, Ddl::RESPONSE_TIME * diuConfig.pciLoopPerUsec);
725+
}*/
726+
/* SHOULD BE ONLY THIS u*/
727+
if (true) { //TODO: Test only with this
728+
//reset(Rorc::Reset::RORC);
729+
//reset(Rorc::Reset::SIU); //TODO: This doesn't happen now
730+
731+
// write(0x0, 0x1); //CRORC device
732+
write(0x0, 0x2); //CRORC channel
733+
write(0x18 / 4, 0xf1); //SIU
734+
//sleep_for(100ms);
735+
write(0x18 / 4, 0xf1); //SIU
736+
write(0x0, 0x2); //CRORC channel
737+
// write(0x0, 0x1); //CRORC device
738+
sleep_for(100ms); //TODO: Make this into a timeout
739+
//reset(Rorc::Reset::SIU);
740+
//reset(Rorc::Reset::RORC);
741+
assertLinkUp();
754742
}
755-
if (resetMask & Rorc::Reset::LINK_UP) {
743+
744+
/* if (resetMask & Rorc::Reset::LINK_UP) {
756745
reset(Rorc::Reset::RORC);
757746
reset(Rorc::Reset::DIU);
758747
reset(Rorc::Reset::SIU);
759748
sleep_for(100ms);
760749
assertLinkUp();
761-
emptyDataFifos(100000);
762750
763751
reset(Rorc::Reset::SIU);
764752
reset(Rorc::Reset::DIU);
@@ -774,7 +762,7 @@ void Crorc::armDdl(int resetMask, const DiuConfig& diuConfig)
774762
}
775763
if (resetMask & Rorc::Reset::RORC) {
776764
reset(Rorc::Reset::RORC);
777-
}
765+
}*/
778766
}
779767

780768
auto Crorc::initDiuVersion() -> DiuConfig
@@ -908,13 +896,16 @@ void Crorc::setDiuLoopback(const DiuConfig& diuConfig)
908896
}
909897

910898
void Crorc::startTrigger(const DiuConfig& diuConfig, uint32_t command)
899+
//void Crorc::startTrigger(uint32_t command)
911900
{
912901
if ((command != Fee::RDYRX) && (command != Fee::STBRD)) {
913902
BOOST_THROW_EXCEPTION(Exception() << ErrorInfo::Message("Trigger can only be started with RDYRX or STBRD."));
914903
}
915904
uint64_t timeout = Ddl::RESPONSE_TIME * diuConfig.pciLoopPerUsec;
916905
ddlSendCommand(Ddl::Destination::FEE, command, 0, 0, timeout);
906+
//ddlSendCommand(Ddl::Destination::FEE, command, 0, 0, 0);
917907
ddlWaitStatus(timeout);
908+
//ddlWaitStatus(0);
918909
ddlReadStatus();
919910
}
920911

@@ -1128,8 +1119,8 @@ uint32_t Crorc::ddlPrintStatus(int destination, int time)
11281119
std::tuple<std::string, uint32_t> Crorc::siuStatus()
11291120
{
11301121
DiuConfig diuConfig = initDiuVersion();
1131-
resetCommand(Rorc::Reset::SIU, diuConfig);
1132-
sleep_for(100ms);
1122+
// resetCommand(Rorc::Reset::SIU, diuConfig);
1123+
// sleep_for(100ms);
11331124

11341125
long long int time = Ddl::RESPONSE_TIME * diuConfig.pciLoopPerUsec;
11351126

‎src/Crorc/Crorc.h‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -64,7 +64,7 @@ class Crorc
6464
/// Arms DDL
6565
/// \param resetMask The reset mask. See the RORC_RESET_* macros in rorc.h
6666
/// \param diuConfig DIU configuration
67-
void armDdl(int resetMask, const DiuConfig& diuConfig);
67+
void armDdl(/*int resetMask, const DiuConfig& diuConfig*/);
6868

6969
/// Arms C-RORC data generator
7070
int armDataGenerator(int dataSize,
@@ -111,6 +111,7 @@ class Crorc
111111

112112
/// Starts the trigger (RDYRX or STBRD)
113113
void startTrigger(const DiuConfig& diuConfig, uint32_t command);
114+
//void startTrigger(uint32_t command);
114115

115116
/// Stops the trigger
116117
void stopTrigger(const DiuConfig& diuConfig);
@@ -207,7 +208,6 @@ class Crorc
207208
long long int ddlWaitStatus(long long int timeout);
208209
StWord ddlReadStatus();
209210
StWord ddlReadCTSTW(int transid, int destination, long long int time);
210-
void emptyDataFifos(int timeoutMicroseconds);
211211
StWord ddlSetSiuLoopBack(const DiuConfig& diuConfig);
212212
StWord ddlSetDiuLoopBack(const DiuConfig& diuConfig);
213213
std::vector<std::string> ddlInterpretIFSTW(uint32_t ifstw);

‎src/Crorc/CrorcBar.cxx‎

Lines changed: 112 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -14,6 +14,9 @@
1414
/// \author Pascal Boeschoten ([email protected])
1515
/// \author Kostas Alexopoulos ([email protected])
1616

17+
#include <chrono>
18+
#include <thread>
19+
1720
#include "Crorc/Constants.h"
1821
#include "Crorc/Crorc.h"
1922
#include "Crorc/CrorcBar.h"
@@ -109,11 +112,26 @@ std::map<int, Crorc::Link> CrorcBar::initializeLinkMap()
109112
return linkMap;
110113
}
111114

115+
bool CrorcBar::checkLinkUp()
116+
{
117+
return !((mPdaBar->readRegister(Crorc::Registers::CHANNEL_CSR.index) & Crorc::Registers::LINK_DOWN));
118+
}
119+
120+
void CrorcBar::assertLinkUp()
121+
{
122+
auto timeOut = std::chrono::steady_clock::now() + std::chrono::milliseconds(100);
123+
while ((std::chrono::steady_clock::now() < timeOut) && !checkLinkUp()) {
124+
}
125+
if (!checkLinkUp()) {
126+
BOOST_THROW_EXCEPTION(CrorcCheckLinkException() << ErrorInfo::Message("Link was not up"));
127+
}
128+
}
129+
112130
bool CrorcBar::isLinkUp(int barIndex)
113131
{
114-
auto params = Parameters::makeParameters(SerialId{ getSerial().get(), getEndpointNumber() }, barIndex);
132+
auto params = Parameters::makeParameters(SerialId{ getSerial().get(), getEndpointNumber() }, barIndex); // TODO: This is problematic...
115133
auto bar = ChannelFactory().getBar(params);
116-
return !((bar->readRegister(Crorc::Registers::C_CSR.index) & Crorc::Registers::LINK_DOWN));
134+
return !((bar->readRegister(Crorc::Registers::CHANNEL_CSR.index) & Crorc::Registers::LINK_DOWN));
117135
}
118136

119137
void CrorcBar::setQsfpEnabled()
@@ -186,5 +204,97 @@ void CrorcBar::getOpticalPowers(std::map<int, Crorc::Link>& linkMap)
186204
}
187205
}
188206

207+
void CrorcBar::sendDdlCommand(uint32_t address, uint32_t command) // TODO: Is the address here always Crorc::Registers::DDL_COMMAND?
208+
{
209+
writeRegister(address / 4, command);
210+
211+
auto checkFifoEmpty = [&]() {
212+
return readRegister(Crorc::Registers::CHAN_CSR.index) & Crorc::Registers::RXSTAT_NOT_EMPTY;
213+
};
214+
215+
auto timeOut = std::chrono::steady_clock::now() + std::chrono::milliseconds(100);
216+
while ((std::chrono::steady_clock::now() < timeOut) && !checkFifoEmpty()) {
217+
}
218+
if (!checkFifoEmpty()) {
219+
BOOST_THROW_EXCEPTION(CrorcCheckLinkException() << ErrorInfo::Message("Link was not up"));
220+
} else {
221+
readRegister(Crorc::Registers::DDL_STATUS.index);
222+
}
223+
}
224+
225+
void CrorcBar::resetSiu()
226+
{
227+
sendDdlCommand(Crorc::Registers::DDL_COMMAND.address, Crorc::Registers::SIU_RESET);
228+
}
229+
230+
void CrorcBar::startTrigger(uint32_t command) //TODO: Rename this
231+
{
232+
sendDdlCommand(Crorc::Registers::DDL_COMMAND.address, command);
233+
}
234+
235+
void CrorcBar::stopTrigger()
236+
{
237+
try {
238+
sendDdlCommand(Crorc::Registers::DDL_COMMAND.address, Fee::EOBTR);
239+
} catch (const Exception& e) {
240+
log("Stopping DDL trigger timed out");
241+
}
242+
}
243+
244+
void CrorcBar::resetCard()
245+
{
246+
writeRegister(Crorc::Registers::CRORC_CSR.index, Crorc::Registers::CRORC_RESET);
247+
}
248+
249+
void CrorcBar::resetDevice()
250+
{
251+
resetCard();
252+
resetSiu();
253+
assertLinkUp();
254+
255+
resetSiu();
256+
resetCard();
257+
assertLinkUp();
258+
259+
return;
260+
}
261+
262+
void CrorcBar::startDataReceiver(uintptr_t readyFifoBusAddress)
263+
{
264+
writeRegister(Crorc::Registers::CHANNEL_RRBAR.index, (readyFifoBusAddress & 0xffffffff));
265+
if (sizeof(uintptr_t) > 4) {
266+
writeRegister(Crorc::Registers::CHANNEL_RRBARX.index, (readyFifoBusAddress >> 32));
267+
} else {
268+
writeRegister(Crorc::Registers::CHANNEL_RRBARX.index, 0x0);
269+
}
270+
271+
if (!(readRegister(Crorc::Registers::CHAN_CSR.index) & Crorc::Registers::DATA_RX_ON_OFF)) {
272+
writeRegister(Crorc::Registers::CHAN_CSR.index, Crorc::Registers::DATA_RX_ON_OFF);
273+
}
274+
}
275+
276+
void CrorcBar::stopDataReceiver()
277+
{
278+
if (readRegister(Crorc::Registers::CHAN_CSR.index) & Crorc::Registers::DATA_RX_ON_OFF) {
279+
writeRegister(Crorc::Registers::CHAN_CSR.index, Crorc::Registers::DATA_RX_ON_OFF);
280+
}
281+
}
282+
283+
void CrorcBar::pushRxFreeFifo(uintptr_t blockAddress, uint32_t blockLength, uint32_t readyFifoIndex)
284+
{
285+
writeRegister(Crorc::Registers::RX_FIFO_ADDR_EXT.index, arch64() ? (blockAddress >> 32) : 0x0);
286+
writeRegister(Crorc::Registers::RX_FIFO_ADDR_HIGH.index, blockAddress & 0xffffffff);
287+
writeRegister(Crorc::Registers::RX_FIFO_ADDR_LOW.index, (blockLength << 8) | readyFifoIndex);
288+
}
289+
290+
/*void CrorcBar::startDataGenerator()
291+
{
292+
}
293+
294+
void CrorcBar::stopDataGenerator()
295+
{
296+
}
297+
*/
298+
189299
} // namespace roc
190300
} // namespace AliceO2

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