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clk: renesas: r9a07g044: Add USB clocks/resets
Add clock/reset entries for USB PHY control, USB2.0 host and device. Signed-off-by: Biju Das <[email protected]> Link: https://lore.kernel.org/r/[email protected] [geert: s/usb0_device/usb0_func] Signed-off-by: Geert Uytterhoeven <[email protected]>
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drivers/clk/renesas/r9a07g044-cpg.c

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Original file line numberDiff line numberDiff line change
@@ -96,6 +96,14 @@ static struct rzg2l_mod_clk r9a07g044_mod_clks[] = {
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0x52c, 0),
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DEF_MOD("dmac_pclk", R9A07G044_DMAC_PCLK, CLK_P1_DIV2,
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0x52c, 1),
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DEF_MOD("usb0_host", R9A07G044_USB_U2H0_HCLK, R9A07G044_CLK_P1,
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0x578, 0),
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DEF_MOD("usb1_host", R9A07G044_USB_U2H1_HCLK, R9A07G044_CLK_P1,
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0x578, 1),
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DEF_MOD("usb0_func", R9A07G044_USB_U2P_EXR_CPUCLK, R9A07G044_CLK_P1,
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0x578, 2),
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DEF_MOD("usb_pclk", R9A07G044_USB_PCLK, R9A07G044_CLK_P1,
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0x578, 3),
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DEF_MOD("i2c0", R9A07G044_I2C0_PCLK, R9A07G044_CLK_P0,
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0x580, 0),
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DEF_MOD("i2c1", R9A07G044_I2C1_PCLK, R9A07G044_CLK_P0,
@@ -124,6 +132,10 @@ static struct rzg2l_reset r9a07g044_resets[] = {
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DEF_RST(R9A07G044_IA55_RESETN, 0x818, 0),
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DEF_RST(R9A07G044_DMAC_ARESETN, 0x82c, 0),
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DEF_RST(R9A07G044_DMAC_RST_ASYNC, 0x82c, 1),
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DEF_RST(R9A07G044_USB_U2H0_HRESETN, 0x878, 0),
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DEF_RST(R9A07G044_USB_U2H1_HRESETN, 0x878, 1),
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DEF_RST(R9A07G044_USB_U2P_EXL_SYSRST, 0x878, 2),
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DEF_RST(R9A07G044_USB_PRESETN, 0x878, 3),
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DEF_RST(R9A07G044_I2C0_MRST, 0x880, 0),
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DEF_RST(R9A07G044_I2C1_MRST, 0x880, 1),
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DEF_RST(R9A07G044_I2C2_MRST, 0x880, 2),

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