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airliedairlied
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Merge tag 'amd-drm-next-5.15-2021-09-01' of https://gitlab.freedesktop.org/agd5f/linux into drm-next
amd-drm-next-5.15-2021-09-01: amdgpu: - Misc cleanups, typo fixes - EEPROM fix - Add some new PCI IDs - Scatter/Gather display support for Yellow Carp - PCIe DPM fix for RKL platforms - RAS fix amdkfd: - SVM fix Signed-off-by: Dave Airlie <[email protected]> From: Alex Deucher <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2 parents 1645cca + d604358 commit 06b224d

29 files changed

+198
-94
lines changed

‎drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c

Lines changed: 33 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -468,42 +468,58 @@ bool amdgpu_atomfirmware_dynamic_boot_config_supported(struct amdgpu_device *ade
468468
return (fw_cap & ATOM_FIRMWARE_CAP_DYNAMIC_BOOT_CFG_ENABLE) ? true : false;
469469
}
470470

471-
/*
472-
* Helper function to query RAS EEPROM address
473-
*
474-
* @adev: amdgpu_device pointer
471+
/**
472+
* amdgpu_atomfirmware_ras_rom_addr -- Get the RAS EEPROM addr from VBIOS
473+
* adev: amdgpu_device pointer
474+
* i2c_address: pointer to u8; if not NULL, will contain
475+
* the RAS EEPROM address if the function returns true
475476
*
476-
* Return true if vbios supports ras rom address reporting
477+
* Return true if VBIOS supports RAS EEPROM address reporting,
478+
* else return false. If true and @i2c_address is not NULL,
479+
* will contain the RAS ROM address.
477480
*/
478-
bool amdgpu_atomfirmware_ras_rom_addr(struct amdgpu_device *adev, uint8_t* i2c_address)
481+
bool amdgpu_atomfirmware_ras_rom_addr(struct amdgpu_device *adev,
482+
u8 *i2c_address)
479483
{
480484
struct amdgpu_mode_info *mode_info = &adev->mode_info;
481485
int index;
482486
u16 data_offset, size;
483487
union firmware_info *firmware_info;
484488
u8 frev, crev;
485489

486-
if (i2c_address == NULL)
487-
return false;
488-
489-
*i2c_address = 0;
490-
491490
index = get_index_into_master_table(atom_master_list_of_data_tables_v2_1,
492-
firmwareinfo);
491+
firmwareinfo);
493492

494493
if (amdgpu_atom_parse_data_header(adev->mode_info.atom_context,
495-
index, &size, &frev, &crev, &data_offset)) {
494+
index, &size, &frev, &crev,
495+
&data_offset)) {
496496
/* support firmware_info 3.4 + */
497497
if ((frev == 3 && crev >=4) || (frev > 3)) {
498498
firmware_info = (union firmware_info *)
499499
(mode_info->atom_context->bios + data_offset);
500-
*i2c_address = firmware_info->v34.ras_rom_i2c_slave_addr;
500+
/* The ras_rom_i2c_slave_addr should ideally
501+
* be a 19-bit EEPROM address, which would be
502+
* used as is by the driver; see top of
503+
* amdgpu_eeprom.c.
504+
*
505+
* When this is the case, 0 is of course a
506+
* valid RAS EEPROM address, in which case,
507+
* we'll drop the first "if (firm...)" and only
508+
* leave the check for the pointer.
509+
*
510+
* The reason this works right now is because
511+
* ras_rom_i2c_slave_addr contains the EEPROM
512+
* device type qualifier 1010b in the top 4
513+
* bits.
514+
*/
515+
if (firmware_info->v34.ras_rom_i2c_slave_addr) {
516+
if (i2c_address)
517+
*i2c_address = firmware_info->v34.ras_rom_i2c_slave_addr;
518+
return true;
519+
}
501520
}
502521
}
503522

504-
if (*i2c_address != 0)
505-
return true;
506-
507523
return false;
508524
}
509525

‎drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -522,6 +522,7 @@ uint32_t amdgpu_display_supported_domains(struct amdgpu_device *adev,
522522
break;
523523
case CHIP_RENOIR:
524524
case CHIP_VANGOGH:
525+
case CHIP_YELLOW_CARP:
525526
domain |= AMDGPU_GEM_DOMAIN_GTT;
526527
break;
527528

‎drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c

Lines changed: 17 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1181,7 +1181,12 @@ static const struct pci_device_id pciidlist[] = {
11811181
{0x1002, 0x73A1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SIENNA_CICHLID},
11821182
{0x1002, 0x73A2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SIENNA_CICHLID},
11831183
{0x1002, 0x73A3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SIENNA_CICHLID},
1184+
{0x1002, 0x73A5, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SIENNA_CICHLID},
1185+
{0x1002, 0x73A8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SIENNA_CICHLID},
1186+
{0x1002, 0x73A9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SIENNA_CICHLID},
11841187
{0x1002, 0x73AB, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SIENNA_CICHLID},
1188+
{0x1002, 0x73AC, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SIENNA_CICHLID},
1189+
{0x1002, 0x73AD, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SIENNA_CICHLID},
11851190
{0x1002, 0x73AE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SIENNA_CICHLID},
11861191
{0x1002, 0x73AF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SIENNA_CICHLID},
11871192
{0x1002, 0x73BF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SIENNA_CICHLID},
@@ -1197,13 +1202,25 @@ static const struct pci_device_id pciidlist[] = {
11971202
{0x1002, 0x73C0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVY_FLOUNDER},
11981203
{0x1002, 0x73C1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVY_FLOUNDER},
11991204
{0x1002, 0x73C3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVY_FLOUNDER},
1205+
{0x1002, 0x73DA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVY_FLOUNDER},
1206+
{0x1002, 0x73DB, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVY_FLOUNDER},
1207+
{0x1002, 0x73DC, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVY_FLOUNDER},
1208+
{0x1002, 0x73DD, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVY_FLOUNDER},
1209+
{0x1002, 0x73DE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVY_FLOUNDER},
12001210
{0x1002, 0x73DF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVY_FLOUNDER},
12011211

12021212
/* DIMGREY_CAVEFISH */
12031213
{0x1002, 0x73E0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_DIMGREY_CAVEFISH},
12041214
{0x1002, 0x73E1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_DIMGREY_CAVEFISH},
12051215
{0x1002, 0x73E2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_DIMGREY_CAVEFISH},
12061216
{0x1002, 0x73E3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_DIMGREY_CAVEFISH},
1217+
{0x1002, 0x73E8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_DIMGREY_CAVEFISH},
1218+
{0x1002, 0x73E9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_DIMGREY_CAVEFISH},
1219+
{0x1002, 0x73EA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_DIMGREY_CAVEFISH},
1220+
{0x1002, 0x73EB, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_DIMGREY_CAVEFISH},
1221+
{0x1002, 0x73EC, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_DIMGREY_CAVEFISH},
1222+
{0x1002, 0x73ED, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_DIMGREY_CAVEFISH},
1223+
{0x1002, 0x73EF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_DIMGREY_CAVEFISH},
12071224
{0x1002, 0x73FF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_DIMGREY_CAVEFISH},
12081225

12091226
/* Aldebaran */

‎drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c

Lines changed: 9 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -59,6 +59,7 @@ void amdgpu_show_fdinfo(struct seq_file *m, struct file *f)
5959
uint64_t vram_mem = 0, gtt_mem = 0, cpu_mem = 0;
6060
struct drm_file *file = f->private_data;
6161
struct amdgpu_device *adev = drm_to_adev(file->minor->dev);
62+
struct amdgpu_bo *root;
6263
int ret;
6364

6465
ret = amdgpu_file_to_fpriv(f, &fpriv);
@@ -69,13 +70,19 @@ void amdgpu_show_fdinfo(struct seq_file *m, struct file *f)
6970
dev = PCI_SLOT(adev->pdev->devfn);
7071
fn = PCI_FUNC(adev->pdev->devfn);
7172

72-
ret = amdgpu_bo_reserve(fpriv->vm.root.bo, false);
73+
root = amdgpu_bo_ref(fpriv->vm.root.bo);
74+
if (!root)
75+
return;
76+
77+
ret = amdgpu_bo_reserve(root, false);
7378
if (ret) {
7479
DRM_ERROR("Fail to reserve bo\n");
7580
return;
7681
}
7782
amdgpu_vm_get_memory(&fpriv->vm, &vram_mem, &gtt_mem, &cpu_mem);
78-
amdgpu_bo_unreserve(fpriv->vm.root.bo);
83+
amdgpu_bo_unreserve(root);
84+
amdgpu_bo_unref(&root);
85+
7986
seq_printf(m, "pdev:\t%04x:%02x:%02x.%d\npasid:\t%u\n", domain, bus,
8087
dev, fn, fpriv->vm.pasid);
8188
seq_printf(m, "vram mem:\t%llu kB\n", vram_mem/1024UL);

‎drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -552,6 +552,9 @@ void amdgpu_fence_driver_hw_fini(struct amdgpu_device *adev)
552552
if (!ring || !ring->fence_drv.initialized)
553553
continue;
554554

555+
if (!ring->no_scheduler)
556+
drm_sched_stop(&ring->sched, NULL);
557+
555558
/* You can't wait for HW to signal if it's gone */
556559
if (!drm_dev_is_unplugged(&adev->ddev))
557560
r = amdgpu_fence_wait_empty(ring);
@@ -611,6 +614,11 @@ void amdgpu_fence_driver_hw_init(struct amdgpu_device *adev)
611614
if (!ring || !ring->fence_drv.initialized)
612615
continue;
613616

617+
if (!ring->no_scheduler) {
618+
drm_sched_resubmit_jobs(&ring->sched);
619+
drm_sched_start(&ring->sched, true);
620+
}
621+
614622
/* enable the interrupt */
615623
if (ring->fence_drv.irq_src)
616624
amdgpu_irq_get(adev, ring->fence_drv.irq_src,

‎drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c

Lines changed: 10 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -341,21 +341,18 @@ int amdgpu_gem_create_ioctl(struct drm_device *dev, void *data,
341341
r = amdgpu_gem_object_create(adev, size, args->in.alignment,
342342
initial_domain,
343343
flags, ttm_bo_type_device, resv, &gobj);
344-
if (r) {
345-
if (r != -ERESTARTSYS) {
346-
if (flags & AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED) {
347-
flags &= ~AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED;
348-
goto retry;
349-
}
344+
if (r && r != -ERESTARTSYS) {
345+
if (flags & AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED) {
346+
flags &= ~AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED;
347+
goto retry;
348+
}
350349

351-
if (initial_domain == AMDGPU_GEM_DOMAIN_VRAM) {
352-
initial_domain |= AMDGPU_GEM_DOMAIN_GTT;
353-
goto retry;
354-
}
355-
DRM_DEBUG("Failed to allocate GEM object (%llu, %d, %llu, %d)\n",
356-
size, initial_domain, args->in.alignment, r);
350+
if (initial_domain == AMDGPU_GEM_DOMAIN_VRAM) {
351+
initial_domain |= AMDGPU_GEM_DOMAIN_GTT;
352+
goto retry;
357353
}
358-
return r;
354+
DRM_DEBUG("Failed to allocate GEM object (%llu, %d, %llu, %d)\n",
355+
size, initial_domain, args->in.alignment, r);
359356
}
360357

361358
if (flags & AMDGPU_GEM_CREATE_VM_ALWAYS_VALID) {

‎drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -118,7 +118,7 @@ bool amdgpu_gtt_mgr_has_gart_addr(struct ttm_resource *res)
118118
* @man: TTM memory type manager
119119
* @tbo: TTM BO we need this range for
120120
* @place: placement flags and restrictions
121-
* @mem: the resulting mem object
121+
* @res: the resulting mem object
122122
*
123123
* Dummy, allocate the node but no space for it yet.
124124
*/
@@ -182,7 +182,7 @@ static int amdgpu_gtt_mgr_new(struct ttm_resource_manager *man,
182182
* amdgpu_gtt_mgr_del - free ranges
183183
*
184184
* @man: TTM memory type manager
185-
* @mem: TTM memory object
185+
* @res: TTM memory object
186186
*
187187
* Free the allocated GTT again.
188188
*/

‎drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -469,10 +469,10 @@ psp_cmd_submit_buf(struct psp_context *psp,
469469
*/
470470
if (!skip_unsupport && (psp->cmd_buf_mem->resp.status || !timeout) && !ras_intr) {
471471
if (ucode)
472-
DRM_WARN("failed to load ucode (%s) ",
473-
amdgpu_ucode_name(ucode->ucode_id));
474-
DRM_WARN("psp gfx command (%s) failed and response status is (0x%X)\n",
475-
psp_gfx_cmd_name(psp->cmd_buf_mem->cmd_id),
472+
DRM_WARN("failed to load ucode %s(0x%X) ",
473+
amdgpu_ucode_name(ucode->ucode_id), ucode->ucode_id);
474+
DRM_WARN("psp gfx command %s(0x%X) failed and response status is (0x%X)\n",
475+
psp_gfx_cmd_name(psp->cmd_buf_mem->cmd_id), psp->cmd_buf_mem->cmd_id,
476476
psp->cmd_buf_mem->resp.status);
477477
if (!timeout) {
478478
ret = -EINVAL;

‎drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c

Lines changed: 13 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -114,21 +114,22 @@ static bool __get_eeprom_i2c_addr_arct(struct amdgpu_device *adev,
114114
static bool __get_eeprom_i2c_addr(struct amdgpu_device *adev,
115115
struct amdgpu_ras_eeprom_control *control)
116116
{
117+
u8 i2c_addr;
118+
117119
if (!control)
118120
return false;
119121

120-
control->i2c_address = 0;
121-
122-
if (amdgpu_atomfirmware_ras_rom_addr(adev, (uint8_t*)&control->i2c_address))
123-
{
124-
if (control->i2c_address == 0xA0)
125-
control->i2c_address = 0;
126-
else if (control->i2c_address == 0xA8)
127-
control->i2c_address = 0x40000;
128-
else {
129-
dev_warn(adev->dev, "RAS EEPROM I2C address not supported");
130-
return false;
131-
}
122+
if (amdgpu_atomfirmware_ras_rom_addr(adev, &i2c_addr)) {
123+
/* The address given by VBIOS is an 8-bit, wire-format
124+
* address, i.e. the most significant byte.
125+
*
126+
* Normalize it to a 19-bit EEPROM address. Remove the
127+
* device type identifier and make it a 7-bit address;
128+
* then make it a 19-bit EEPROM address. See top of
129+
* amdgpu_eeprom.c.
130+
*/
131+
i2c_addr = (i2c_addr & 0x0F) >> 1;
132+
control->i2c_address = ((u32) i2c_addr) << 16;
132133

133134
return true;
134135
}

‎drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -361,7 +361,7 @@ static void amdgpu_vram_mgr_virt_start(struct ttm_resource *mem,
361361
* @man: TTM memory type manager
362362
* @tbo: TTM BO we need this range for
363363
* @place: placement flags and restrictions
364-
* @mem: the resulting mem object
364+
* @res: the resulting mem object
365365
*
366366
* Allocate VRAM for the given BO.
367367
*/
@@ -487,7 +487,7 @@ static int amdgpu_vram_mgr_new(struct ttm_resource_manager *man,
487487
* amdgpu_vram_mgr_del - free ranges
488488
*
489489
* @man: TTM memory type manager
490-
* @mem: TTM memory object
490+
* @res: TTM memory object
491491
*
492492
* Free the allocated VRAM again.
493493
*/
@@ -522,7 +522,7 @@ static void amdgpu_vram_mgr_del(struct ttm_resource_manager *man,
522522
* amdgpu_vram_mgr_alloc_sgt - allocate and fill a sg table
523523
*
524524
* @adev: amdgpu device pointer
525-
* @mem: TTM memory object
525+
* @res: TTM memory object
526526
* @offset: byte offset from the base of VRAM BO
527527
* @length: number of bytes to export in sg_table
528528
* @dev: the other device

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