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Sibi SankarpH5
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reset: qcom: Add PDC Global reset signals for WPSS
Add PDC Global reset signals for Wireless Processor Subsystem (WPSS) on SC7280 SoCs. Acked-by: Philipp Zabel <[email protected]> Reviewed-by: Philipp Zabel <[email protected]> Signed-off-by: Sibi Sankar <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Philipp Zabel <[email protected]>
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drivers/reset/reset-qcom-pdc.c

Lines changed: 51 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -11,18 +11,26 @@
1111

1212
#include <dt-bindings/reset/qcom,sdm845-pdc.h>
1313

14-
#define RPMH_PDC_SYNC_RESET 0x100
14+
#define RPMH_SDM845_PDC_SYNC_RESET 0x100
15+
#define RPMH_SC7280_PDC_SYNC_RESET 0x1000
1516

1617
struct qcom_pdc_reset_map {
1718
u8 bit;
1819
};
1920

21+
struct qcom_pdc_reset_desc {
22+
const struct qcom_pdc_reset_map *resets;
23+
size_t num_resets;
24+
unsigned int offset;
25+
};
26+
2027
struct qcom_pdc_reset_data {
2128
struct reset_controller_dev rcdev;
2229
struct regmap *regmap;
30+
const struct qcom_pdc_reset_desc *desc;
2331
};
2432

25-
static const struct regmap_config sdm845_pdc_regmap_config = {
33+
static const struct regmap_config pdc_regmap_config = {
2634
.name = "pdc-reset",
2735
.reg_bits = 32,
2836
.reg_stride = 4,
@@ -44,6 +52,33 @@ static const struct qcom_pdc_reset_map sdm845_pdc_resets[] = {
4452
[PDC_MODEM_SYNC_RESET] = {9},
4553
};
4654

55+
static const struct qcom_pdc_reset_desc sdm845_pdc_reset_desc = {
56+
.resets = sdm845_pdc_resets,
57+
.num_resets = ARRAY_SIZE(sdm845_pdc_resets),
58+
.offset = RPMH_SDM845_PDC_SYNC_RESET,
59+
};
60+
61+
static const struct qcom_pdc_reset_map sc7280_pdc_resets[] = {
62+
[PDC_APPS_SYNC_RESET] = {0},
63+
[PDC_SP_SYNC_RESET] = {1},
64+
[PDC_AUDIO_SYNC_RESET] = {2},
65+
[PDC_SENSORS_SYNC_RESET] = {3},
66+
[PDC_AOP_SYNC_RESET] = {4},
67+
[PDC_DEBUG_SYNC_RESET] = {5},
68+
[PDC_GPU_SYNC_RESET] = {6},
69+
[PDC_DISPLAY_SYNC_RESET] = {7},
70+
[PDC_COMPUTE_SYNC_RESET] = {8},
71+
[PDC_MODEM_SYNC_RESET] = {9},
72+
[PDC_WLAN_RF_SYNC_RESET] = {10},
73+
[PDC_WPSS_SYNC_RESET] = {11},
74+
};
75+
76+
static const struct qcom_pdc_reset_desc sc7280_pdc_reset_desc = {
77+
.resets = sc7280_pdc_resets,
78+
.num_resets = ARRAY_SIZE(sc7280_pdc_resets),
79+
.offset = RPMH_SC7280_PDC_SYNC_RESET,
80+
};
81+
4782
static inline struct qcom_pdc_reset_data *to_qcom_pdc_reset_data(
4883
struct reset_controller_dev *rcdev)
4984
{
@@ -54,19 +89,18 @@ static int qcom_pdc_control_assert(struct reset_controller_dev *rcdev,
5489
unsigned long idx)
5590
{
5691
struct qcom_pdc_reset_data *data = to_qcom_pdc_reset_data(rcdev);
92+
u32 mask = BIT(data->desc->resets[idx].bit);
5793

58-
return regmap_update_bits(data->regmap, RPMH_PDC_SYNC_RESET,
59-
BIT(sdm845_pdc_resets[idx].bit),
60-
BIT(sdm845_pdc_resets[idx].bit));
94+
return regmap_update_bits(data->regmap, data->desc->offset, mask, mask);
6195
}
6296

6397
static int qcom_pdc_control_deassert(struct reset_controller_dev *rcdev,
6498
unsigned long idx)
6599
{
66100
struct qcom_pdc_reset_data *data = to_qcom_pdc_reset_data(rcdev);
101+
u32 mask = BIT(data->desc->resets[idx].bit);
67102

68-
return regmap_update_bits(data->regmap, RPMH_PDC_SYNC_RESET,
69-
BIT(sdm845_pdc_resets[idx].bit), 0);
103+
return regmap_update_bits(data->regmap, data->desc->offset, mask, 0);
70104
}
71105

72106
static const struct reset_control_ops qcom_pdc_reset_ops = {
@@ -76,37 +110,43 @@ static const struct reset_control_ops qcom_pdc_reset_ops = {
76110

77111
static int qcom_pdc_reset_probe(struct platform_device *pdev)
78112
{
113+
const struct qcom_pdc_reset_desc *desc;
79114
struct qcom_pdc_reset_data *data;
80115
struct device *dev = &pdev->dev;
81116
void __iomem *base;
82117
struct resource *res;
83118

119+
desc = device_get_match_data(&pdev->dev);
120+
if (!desc)
121+
return -EINVAL;
122+
84123
data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
85124
if (!data)
86125
return -ENOMEM;
87126

127+
data->desc = desc;
88128
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
89129
base = devm_ioremap_resource(dev, res);
90130
if (IS_ERR(base))
91131
return PTR_ERR(base);
92132

93-
data->regmap = devm_regmap_init_mmio(dev, base,
94-
&sdm845_pdc_regmap_config);
133+
data->regmap = devm_regmap_init_mmio(dev, base, &pdc_regmap_config);
95134
if (IS_ERR(data->regmap)) {
96135
dev_err(dev, "Unable to initialize regmap\n");
97136
return PTR_ERR(data->regmap);
98137
}
99138

100139
data->rcdev.owner = THIS_MODULE;
101140
data->rcdev.ops = &qcom_pdc_reset_ops;
102-
data->rcdev.nr_resets = ARRAY_SIZE(sdm845_pdc_resets);
141+
data->rcdev.nr_resets = desc->num_resets;
103142
data->rcdev.of_node = dev->of_node;
104143

105144
return devm_reset_controller_register(dev, &data->rcdev);
106145
}
107146

108147
static const struct of_device_id qcom_pdc_reset_of_match[] = {
109-
{ .compatible = "qcom,sdm845-pdc-global" },
148+
{ .compatible = "qcom,sc7280-pdc-global", .data = &sc7280_pdc_reset_desc },
149+
{ .compatible = "qcom,sdm845-pdc-global", .data = &sdm845_pdc_reset_desc },
110150
{}
111151
};
112152
MODULE_DEVICE_TABLE(of, qcom_pdc_reset_of_match);

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