@@ -130,36 +130,34 @@ additionalProperties: false
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examples :
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- |
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- #include <dt-bindings/clock/mt8195-clk.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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- #include <dt-bindings/power/mt8195-power.h>
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afe: mt8195-afe-pcm@10890000 {
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compatible = "mediatek,mt8195-audio";
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reg = <0x10890000 0x10000>;
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interrupts = <GIC_SPI 822 IRQ_TYPE_LEVEL_HIGH 0>;
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mediatek,topckgen = <&topckgen>;
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- power-domains = <&spm MT8195_POWER_DOMAIN_AUDIO>;
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+ power-domains = <&spm 7>; //MT8195_POWER_DOMAIN_AUDIO
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clocks = <&clk26m>,
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- <&topckgen CLK_TOP_APLL1>,
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- <&topckgen CLK_TOP_APLL2>,
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- <&topckgen CLK_TOP_APLL12_DIV0>,
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- <&topckgen CLK_TOP_APLL12_DIV1>,
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- <&topckgen CLK_TOP_APLL12_DIV2>,
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- <&topckgen CLK_TOP_APLL12_DIV3>,
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- <&topckgen CLK_TOP_APLL12_DIV9>,
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- <&topckgen CLK_TOP_A1SYS_HP_SEL>,
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- <&topckgen CLK_TOP_AUD_INTBUS_SEL>,
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- <&topckgen CLK_TOP_AUDIO_H_SEL>,
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- <&topckgen CLK_TOP_AUDIO_LOCAL_BUS_SEL>,
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- <&topckgen CLK_TOP_DPTX_M_SEL>,
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- <&topckgen CLK_TOP_I2SO1_M_SEL>,
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- <&topckgen CLK_TOP_I2SO2_M_SEL>,
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- <&topckgen CLK_TOP_I2SI1_M_SEL>,
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- <&topckgen CLK_TOP_I2SI2_M_SEL>,
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- <&infracfg_ao CLK_INFRA_AO_AUDIO_26M_B>,
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- <&scp_adsp CLK_SCP_ADSP_AUDIODSP>;
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+ <&topckgen 163>, //CLK_TOP_APLL1
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+ <&topckgen 166>, //CLK_TOP_APLL2
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+ <&topckgen 233>, //CLK_TOP_APLL12_DIV0
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+ <&topckgen 234>, //CLK_TOP_APLL12_DIV1
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+ <&topckgen 235>, //CLK_TOP_APLL12_DIV2
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+ <&topckgen 236>, //CLK_TOP_APLL12_DIV3
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+ <&topckgen 238>, //CLK_TOP_APLL12_DIV9
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+ <&topckgen 100>, //CLK_TOP_A1SYS_HP_SEL
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+ <&topckgen 33>, //CLK_TOP_AUD_INTBUS_SEL
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+ <&topckgen 34>, //CLK_TOP_AUDIO_H_SEL
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+ <&topckgen 107>, //CLK_TOP_AUDIO_LOCAL_BUS_SEL
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+ <&topckgen 98>, //CLK_TOP_DPTX_M_SEL
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+ <&topckgen 94>, //CLK_TOP_I2SO1_M_SEL
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+ <&topckgen 95>, //CLK_TOP_I2SO2_M_SEL
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+ <&topckgen 96>, //CLK_TOP_I2SI1_M_SEL
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+ <&topckgen 97>, //CLK_TOP_I2SI2_M_SEL
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+ <&infracfg_ao 50>, //CLK_INFRA_AO_AUDIO_26M_B
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+ <&scp_adsp 0>; //CLK_SCP_ADSP_AUDIODSP
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clock-names = "clk26m",
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"apll1_ck",
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"apll2_ck",
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