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Commit 3235809

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Likun Gaoalexdeucher
authored andcommitted
drm/amdgpu: update the method for harvest IP for specific SKU
Update the method of disabling VCN IP for specific SKU for navi1x ASIC, it will judge whether should add the related IP at the function of amdgpu_device_ip_block_add(). Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Guchun Chen <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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+16
-14
lines changed
  • drivers/gpu/drm/amd/amdgpu

1 file changed

+16
-14
lines changed

drivers/gpu/drm/amd/amdgpu/nv.c

Lines changed: 16 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -623,6 +623,16 @@ static const struct amdgpu_ip_block_version nv_common_ip_block =
623623
.funcs = &nv_common_ip_funcs,
624624
};
625625

626+
static bool nv_is_headless_sku(struct pci_dev *pdev)
627+
{
628+
if ((pdev->device == 0x731E &&
629+
(pdev->revision == 0xC6 || pdev->revision == 0xC7)) ||
630+
(pdev->device == 0x7340 && pdev->revision == 0xC9) ||
631+
(pdev->device == 0x7360 && pdev->revision == 0xC7))
632+
return true;
633+
return false;
634+
}
635+
626636
static int nv_reg_base_init(struct amdgpu_device *adev)
627637
{
628638
int r;
@@ -636,6 +646,10 @@ static int nv_reg_base_init(struct amdgpu_device *adev)
636646
}
637647

638648
amdgpu_discovery_harvest_ip(adev);
649+
if (nv_is_headless_sku(adev->pdev)) {
650+
adev->harvest_ip_mask |= AMD_HARVEST_IP_VCN_MASK;
651+
adev->harvest_ip_mask |= AMD_HARVEST_IP_JPEG_MASK;
652+
}
639653

640654
return 0;
641655
}
@@ -673,16 +687,6 @@ void nv_set_virt_ops(struct amdgpu_device *adev)
673687
adev->virt.ops = &xgpu_nv_virt_ops;
674688
}
675689

676-
static bool nv_is_headless_sku(struct pci_dev *pdev)
677-
{
678-
if ((pdev->device == 0x731E &&
679-
(pdev->revision == 0xC6 || pdev->revision == 0xC7)) ||
680-
(pdev->device == 0x7340 && pdev->revision == 0xC9) ||
681-
(pdev->device == 0x7360 && pdev->revision == 0xC7))
682-
return true;
683-
return false;
684-
}
685-
686690
int nv_set_ip_blocks(struct amdgpu_device *adev)
687691
{
688692
int r;
@@ -730,8 +734,7 @@ int nv_set_ip_blocks(struct amdgpu_device *adev)
730734
if (adev->firmware.load_type == AMDGPU_FW_LOAD_DIRECT &&
731735
!amdgpu_sriov_vf(adev))
732736
amdgpu_device_ip_block_add(adev, &smu_v11_0_ip_block);
733-
if (!nv_is_headless_sku(adev->pdev))
734-
amdgpu_device_ip_block_add(adev, &vcn_v2_0_ip_block);
737+
amdgpu_device_ip_block_add(adev, &vcn_v2_0_ip_block);
735738
amdgpu_device_ip_block_add(adev, &jpeg_v2_0_ip_block);
736739
if (adev->enable_mes)
737740
amdgpu_device_ip_block_add(adev, &mes_v10_1_ip_block);
@@ -754,8 +757,7 @@ int nv_set_ip_blocks(struct amdgpu_device *adev)
754757
if (adev->firmware.load_type == AMDGPU_FW_LOAD_DIRECT &&
755758
!amdgpu_sriov_vf(adev))
756759
amdgpu_device_ip_block_add(adev, &smu_v11_0_ip_block);
757-
if (!nv_is_headless_sku(adev->pdev))
758-
amdgpu_device_ip_block_add(adev, &vcn_v2_0_ip_block);
760+
amdgpu_device_ip_block_add(adev, &vcn_v2_0_ip_block);
759761
if (!amdgpu_sriov_vf(adev))
760762
amdgpu_device_ip_block_add(adev, &jpeg_v2_0_ip_block);
761763
break;

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