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Merge tag 'drm-fixes-2021-05-15' of git://anongit.freedesktop.org/drm/drm
Pull more drm fixes from Dave Airlie: "Looks like I wasn't the only one not fully switched on this week. The msm pull has a missing tag so I missed it, and i915 team were a bit late. In my defence I did have a day with the roof of my home office removed, so was sitting at my kids desk. msm: - dsi regression fix - dma-buf pinning fix - displayport fixes - llc fix i915: - Fix active callback alignment annotations and subsequent crashes - Retract link training strategy to slow and wide, again - Avoid division by zero on gen2 - Use correct width reads for C0DRB3/C1DRB3 registers - Fix double free in pdp allocation failure path - Fix HDMI 2.1 PCON downstream caps check" * tag 'drm-fixes-2021-05-15' of git://anongit.freedesktop.org/drm/drm: drm/i915: Use correct downstream caps for check Src-Ctl mode for PCON drm/i915/overlay: Fix active retire callback alignment drm/i915: Fix crash in auto_retire drm/i915/gt: Fix a double free in gen8_preallocate_top_level_pdp drm/i915: Read C0DRB3/C1DRB3 as 16 bits again drm/i915: Avoid div-by-zero on gen2 drm/i915/dp: Use slow and wide link training for everything drm/msm/dp: initialize audio_comp when audio starts drm/msm/dp: check sink_count before update is_connected status drm/msm: fix minor version to indicate MSM_PARAM_SUSPENDS support drm/msm/dsi: fix msm_dsi_phy_get_clk_provider return code drm/msm/dsi: dsi_phy_28nm_8960: fix uninitialized variable access drm/msm: fix LLC not being enabled for mmu500 targets drm/msm: Do not unpin/evict exported dma-buf's
2 parents ffb324e + 5dce58d commit 33f85ca

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‎drivers/gpu/drm/i915/display/intel_dp.c

Lines changed: 6 additions & 55 deletions
Original file line numberDiff line numberDiff line change
@@ -1095,44 +1095,6 @@ intel_dp_compute_link_config_wide(struct intel_dp *intel_dp,
10951095
return -EINVAL;
10961096
}
10971097

1098-
/* Optimize link config in order: max bpp, min lanes, min clock */
1099-
static int
1100-
intel_dp_compute_link_config_fast(struct intel_dp *intel_dp,
1101-
struct intel_crtc_state *pipe_config,
1102-
const struct link_config_limits *limits)
1103-
{
1104-
const struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode;
1105-
int bpp, clock, lane_count;
1106-
int mode_rate, link_clock, link_avail;
1107-
1108-
for (bpp = limits->max_bpp; bpp >= limits->min_bpp; bpp -= 2 * 3) {
1109-
int output_bpp = intel_dp_output_bpp(pipe_config->output_format, bpp);
1110-
1111-
mode_rate = intel_dp_link_required(adjusted_mode->crtc_clock,
1112-
output_bpp);
1113-
1114-
for (lane_count = limits->min_lane_count;
1115-
lane_count <= limits->max_lane_count;
1116-
lane_count <<= 1) {
1117-
for (clock = limits->min_clock; clock <= limits->max_clock; clock++) {
1118-
link_clock = intel_dp->common_rates[clock];
1119-
link_avail = intel_dp_max_data_rate(link_clock,
1120-
lane_count);
1121-
1122-
if (mode_rate <= link_avail) {
1123-
pipe_config->lane_count = lane_count;
1124-
pipe_config->pipe_bpp = bpp;
1125-
pipe_config->port_clock = link_clock;
1126-
1127-
return 0;
1128-
}
1129-
}
1130-
}
1131-
}
1132-
1133-
return -EINVAL;
1134-
}
1135-
11361098
static int intel_dp_dsc_compute_bpp(struct intel_dp *intel_dp, u8 dsc_max_bpc)
11371099
{
11381100
int i, num_bpc;
@@ -1382,22 +1344,11 @@ intel_dp_compute_link_config(struct intel_encoder *encoder,
13821344
intel_dp_can_bigjoiner(intel_dp))
13831345
pipe_config->bigjoiner = true;
13841346

1385-
if (intel_dp_is_edp(intel_dp))
1386-
/*
1387-
* Optimize for fast and narrow. eDP 1.3 section 3.3 and eDP 1.4
1388-
* section A.1: "It is recommended that the minimum number of
1389-
* lanes be used, using the minimum link rate allowed for that
1390-
* lane configuration."
1391-
*
1392-
* Note that we fall back to the max clock and lane count for eDP
1393-
* panels that fail with the fast optimal settings (see
1394-
* intel_dp->use_max_params), in which case the fast vs. wide
1395-
* choice doesn't matter.
1396-
*/
1397-
ret = intel_dp_compute_link_config_fast(intel_dp, pipe_config, &limits);
1398-
else
1399-
/* Optimize for slow and wide. */
1400-
ret = intel_dp_compute_link_config_wide(intel_dp, pipe_config, &limits);
1347+
/*
1348+
* Optimize for slow and wide for everything, because there are some
1349+
* eDP 1.3 and 1.4 panels don't work well with fast and narrow.
1350+
*/
1351+
ret = intel_dp_compute_link_config_wide(intel_dp, pipe_config, &limits);
14011352

14021353
/* enable compression if the mode doesn't fit available BW */
14031354
drm_dbg_kms(&i915->drm, "Force DSC en = %d\n", intel_dp->force_dsc_en);
@@ -2160,7 +2111,7 @@ void intel_dp_check_frl_training(struct intel_dp *intel_dp)
21602111
* -PCON supports SRC_CTL_MODE (VESA DP2.0-HDMI2.1 PCON Spec Draft-1 Sec-7)
21612112
* -sink is HDMI2.1
21622113
*/
2163-
if (!(intel_dp->dpcd[2] & DP_PCON_SOURCE_CTL_MODE) ||
2114+
if (!(intel_dp->downstream_ports[2] & DP_PCON_SOURCE_CTL_MODE) ||
21642115
!intel_dp_is_hdmi_2_1_sink(intel_dp) ||
21652116
intel_dp->frl.is_trained)
21662117
return;

‎drivers/gpu/drm/i915/display/intel_overlay.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -383,7 +383,7 @@ static void intel_overlay_off_tail(struct intel_overlay *overlay)
383383
i830_overlay_clock_gating(dev_priv, true);
384384
}
385385

386-
static void
386+
__i915_active_call static void
387387
intel_overlay_last_flip_retire(struct i915_active *active)
388388
{
389389
struct intel_overlay *overlay =

‎drivers/gpu/drm/i915/gem/i915_gem_mman.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -189,7 +189,7 @@ compute_partial_view(const struct drm_i915_gem_object *obj,
189189
struct i915_ggtt_view view;
190190

191191
if (i915_gem_object_is_tiled(obj))
192-
chunk = roundup(chunk, tile_row_pages(obj));
192+
chunk = roundup(chunk, tile_row_pages(obj) ?: 1);
193193

194194
view.type = I915_GGTT_VIEW_PARTIAL;
195195
view.partial.offset = rounddown(page_offset, chunk);

‎drivers/gpu/drm/i915/gt/gen8_ppgtt.c

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -641,7 +641,6 @@ static int gen8_preallocate_top_level_pdp(struct i915_ppgtt *ppgtt)
641641

642642
err = pin_pt_dma(vm, pde->pt.base);
643643
if (err) {
644-
i915_gem_object_put(pde->pt.base);
645644
free_pd(vm, pde);
646645
return err;
647646
}

‎drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -653,8 +653,8 @@ static void detect_bit_6_swizzle(struct i915_ggtt *ggtt)
653653
* banks of memory are paired and unswizzled on the
654654
* uneven portion, so leave that as unknown.
655655
*/
656-
if (intel_uncore_read(uncore, C0DRB3) ==
657-
intel_uncore_read(uncore, C1DRB3)) {
656+
if (intel_uncore_read16(uncore, C0DRB3) ==
657+
intel_uncore_read16(uncore, C1DRB3)) {
658658
swizzle_x = I915_BIT_6_SWIZZLE_9_10;
659659
swizzle_y = I915_BIT_6_SWIZZLE_9;
660660
}

‎drivers/gpu/drm/i915/i915_active.c

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1156,7 +1156,8 @@ static int auto_active(struct i915_active *ref)
11561156
return 0;
11571157
}
11581158

1159-
static void auto_retire(struct i915_active *ref)
1159+
__i915_active_call static void
1160+
auto_retire(struct i915_active *ref)
11601161
{
11611162
i915_active_put(ref);
11621163
}

‎drivers/gpu/drm/msm/adreno/a6xx_gpu.c

Lines changed: 5 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1153,10 +1153,6 @@ static void a6xx_llc_slices_init(struct platform_device *pdev,
11531153
{
11541154
struct device_node *phandle;
11551155

1156-
a6xx_gpu->llc_mmio = msm_ioremap(pdev, "cx_mem", "gpu_cx");
1157-
if (IS_ERR(a6xx_gpu->llc_mmio))
1158-
return;
1159-
11601156
/*
11611157
* There is a different programming path for targets with an mmu500
11621158
* attached, so detect if that is the case
@@ -1166,6 +1162,11 @@ static void a6xx_llc_slices_init(struct platform_device *pdev,
11661162
of_device_is_compatible(phandle, "arm,mmu-500"));
11671163
of_node_put(phandle);
11681164

1165+
if (a6xx_gpu->have_mmu500)
1166+
a6xx_gpu->llc_mmio = NULL;
1167+
else
1168+
a6xx_gpu->llc_mmio = msm_ioremap(pdev, "cx_mem", "gpu_cx");
1169+
11691170
a6xx_gpu->llc_slice = llcc_slice_getd(LLCC_GPU);
11701171
a6xx_gpu->htw_llc_slice = llcc_slice_getd(LLCC_GPUHTW);
11711172

‎drivers/gpu/drm/msm/dp/dp_audio.c

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -527,6 +527,7 @@ int dp_audio_hw_params(struct device *dev,
527527
dp_audio_setup_acr(audio);
528528
dp_audio_safe_to_exit_level(audio);
529529
dp_audio_enable(audio, true);
530+
dp_display_signal_audio_start(dp_display);
530531
dp_display->audio_enabled = true;
531532

532533
end:

‎drivers/gpu/drm/msm/dp/dp_display.c

Lines changed: 17 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -178,6 +178,15 @@ static int dp_del_event(struct dp_display_private *dp_priv, u32 event)
178178
return 0;
179179
}
180180

181+
void dp_display_signal_audio_start(struct msm_dp *dp_display)
182+
{
183+
struct dp_display_private *dp;
184+
185+
dp = container_of(dp_display, struct dp_display_private, dp_display);
186+
187+
reinit_completion(&dp->audio_comp);
188+
}
189+
181190
void dp_display_signal_audio_complete(struct msm_dp *dp_display)
182191
{
183192
struct dp_display_private *dp;
@@ -586,10 +595,8 @@ static int dp_connect_pending_timeout(struct dp_display_private *dp, u32 data)
586595
mutex_lock(&dp->event_mutex);
587596

588597
state = dp->hpd_state;
589-
if (state == ST_CONNECT_PENDING) {
590-
dp_display_enable(dp, 0);
598+
if (state == ST_CONNECT_PENDING)
591599
dp->hpd_state = ST_CONNECTED;
592-
}
593600

594601
mutex_unlock(&dp->event_mutex);
595602

@@ -651,7 +658,6 @@ static int dp_hpd_unplug_handle(struct dp_display_private *dp, u32 data)
651658
dp_add_event(dp, EV_DISCONNECT_PENDING_TIMEOUT, 0, DP_TIMEOUT_5_SECOND);
652659

653660
/* signal the disconnect event early to ensure proper teardown */
654-
reinit_completion(&dp->audio_comp);
655661
dp_display_handle_plugged_change(g_dp_display, false);
656662

657663
dp_catalog_hpd_config_intr(dp->catalog, DP_DP_HPD_PLUG_INT_MASK |
@@ -669,10 +675,8 @@ static int dp_disconnect_pending_timeout(struct dp_display_private *dp, u32 data
669675
mutex_lock(&dp->event_mutex);
670676

671677
state = dp->hpd_state;
672-
if (state == ST_DISCONNECT_PENDING) {
673-
dp_display_disable(dp, 0);
678+
if (state == ST_DISCONNECT_PENDING)
674679
dp->hpd_state = ST_DISCONNECTED;
675-
}
676680

677681
mutex_unlock(&dp->event_mutex);
678682

@@ -898,7 +902,6 @@ static int dp_display_disable(struct dp_display_private *dp, u32 data)
898902
/* wait only if audio was enabled */
899903
if (dp_display->audio_enabled) {
900904
/* signal the disconnect event */
901-
reinit_completion(&dp->audio_comp);
902905
dp_display_handle_plugged_change(dp_display, false);
903906
if (!wait_for_completion_timeout(&dp->audio_comp,
904907
HZ * 5))
@@ -1272,7 +1275,12 @@ static int dp_pm_resume(struct device *dev)
12721275

12731276
status = dp_catalog_link_is_connected(dp->catalog);
12741277

1275-
if (status)
1278+
/*
1279+
* can not declared display is connected unless
1280+
* HDMI cable is plugged in and sink_count of
1281+
* dongle become 1
1282+
*/
1283+
if (status && dp->link->sink_count)
12761284
dp->dp_display.is_connected = true;
12771285
else
12781286
dp->dp_display.is_connected = false;

‎drivers/gpu/drm/msm/dp/dp_display.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -34,6 +34,7 @@ int dp_display_get_modes(struct msm_dp *dp_display,
3434
int dp_display_request_irq(struct msm_dp *dp_display);
3535
bool dp_display_check_video_test(struct msm_dp *dp_display);
3636
int dp_display_get_test_bpp(struct msm_dp *dp_display);
37+
void dp_display_signal_audio_start(struct msm_dp *dp_display);
3738
void dp_display_signal_audio_complete(struct msm_dp *dp_display);
3839

3940
#endif /* _DP_DISPLAY_H_ */

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