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mips: ralink: convert to CONFIG_COMMON_CLK
ralink only has a very trivial clock implementation, with everything being fixed clocks. Convert it to CONFIG_COMMON_CLK to reduce the number of platforms that rely on legacy clocks. Of course, the clocks really should be read from the device tree instead, but this is a step into that direction. This adds about 50KB to the kernel image size, which is an unfortunate increase, but not as bad as I had feared: text data bss dec hex filename 3778560 1582216 92256 5453032 5334e8 vmlinux-vocore-before 3822148 1601192 92304 5515644 54297c vmlinux-vocore-after 3870226 1644468 200192 5714886 5733c6 vmlinux-rt305x-before 3916727 1668404 200240 5785371 58471b vmlinux-rt305x-after Signed-off-by: Arnd Bergmann <[email protected]>
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3 files changed

+4
-66
lines changed

3 files changed

+4
-66
lines changed

arch/mips/Kconfig

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -630,6 +630,7 @@ config MACH_NINTENDO64
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config RALINK
631631
bool "Ralink based machines"
632632
select CEVT_R4K
633+
select COMMON_CLK
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select CSRC_R4K
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select BOOT_RAW
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select DMA_NONCOHERENT

arch/mips/ralink/Kconfig

Lines changed: 0 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -28,22 +28,18 @@ choice
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bool "RT288x"
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select MIPS_AUTO_PFN_OFFSET
3030
select MIPS_L1_CACHE_SHIFT_4
31-
select HAVE_LEGACY_CLK
3231
select HAVE_PCI
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3433
config SOC_RT305X
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bool "RT305x"
36-
select HAVE_LEGACY_CLK
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3836
config SOC_RT3883
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bool "RT3883"
40-
select HAVE_LEGACY_CLK
4138
select HAVE_PCI
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4340
config SOC_MT7620
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bool "MT7620/8"
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select CPU_MIPSR2_IRQ_VI
46-
select HAVE_LEGACY_CLK
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select HAVE_PCI
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config SOC_MT7621
@@ -54,7 +50,6 @@ choice
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select SYS_SUPPORTS_MIPS_CPS
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select SYS_SUPPORTS_HIGHMEM
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select MIPS_GIC
57-
select COMMON_CLK
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select CLKSRC_MIPS_GIC
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select HAVE_PCI if PCI_MT7621
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select SOC_BUS

arch/mips/ralink/clk.c

Lines changed: 3 additions & 61 deletions
Original file line numberDiff line numberDiff line change
@@ -10,79 +10,21 @@
1010
#include <linux/export.h>
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#include <linux/clkdev.h>
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#include <linux/clk.h>
13+
#include <linux/clk-provider.h>
1314

1415
#include <asm/time.h>
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1617
#include "common.h"
1718

18-
struct clk {
19-
struct clk_lookup cl;
20-
unsigned long rate;
21-
};
22-
2319
void ralink_clk_add(const char *dev, unsigned long rate)
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{
25-
struct clk *clk = kzalloc(sizeof(struct clk), GFP_KERNEL);
21+
struct clk *clk = clk_register_fixed_rate(NULL, dev, NULL, 0, rate);
2622

2723
if (!clk)
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panic("failed to add clock");
2925

30-
clk->cl.dev_id = dev;
31-
clk->cl.clk = clk;
32-
33-
clk->rate = rate;
34-
35-
clkdev_add(&clk->cl);
36-
}
37-
38-
/*
39-
* Linux clock API
40-
*/
41-
int clk_enable(struct clk *clk)
42-
{
43-
return 0;
44-
}
45-
EXPORT_SYMBOL_GPL(clk_enable);
46-
47-
void clk_disable(struct clk *clk)
48-
{
49-
}
50-
EXPORT_SYMBOL_GPL(clk_disable);
51-
52-
unsigned long clk_get_rate(struct clk *clk)
53-
{
54-
if (!clk)
55-
return 0;
56-
57-
return clk->rate;
58-
}
59-
EXPORT_SYMBOL_GPL(clk_get_rate);
60-
61-
int clk_set_rate(struct clk *clk, unsigned long rate)
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{
63-
return -1;
64-
}
65-
EXPORT_SYMBOL_GPL(clk_set_rate);
66-
67-
long clk_round_rate(struct clk *clk, unsigned long rate)
68-
{
69-
return -1;
70-
}
71-
EXPORT_SYMBOL_GPL(clk_round_rate);
72-
73-
int clk_set_parent(struct clk *clk, struct clk *parent)
74-
{
75-
WARN_ON(clk);
76-
return -1;
77-
}
78-
EXPORT_SYMBOL_GPL(clk_set_parent);
79-
80-
struct clk *clk_get_parent(struct clk *clk)
81-
{
82-
WARN_ON(clk);
83-
return NULL;
26+
clkdev_create(clk, NULL, "%s", dev);
8427
}
85-
EXPORT_SYMBOL_GPL(clk_get_parent);
8628

8729
void __init plat_time_init(void)
8830
{

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