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* Copyright (c) 2020 周琰杰 (Zhou Yanjie) <[email protected] >
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*/
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+ #include <linux/bitfield.h>
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#include <linux/bitops.h>
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#include <linux/clk.h>
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#include <linux/clk-provider.h>
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/* bits within the OSTCCR register */
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#define OSTCCR_PRESCALE1_MASK 0x3
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#define OSTCCR_PRESCALE2_MASK 0xc
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- #define OSTCCR_PRESCALE1_LSB 0
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- #define OSTCCR_PRESCALE2_LSB 2
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/* bits within the OSTCR register */
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#define OSTCR_OST1CLR BIT(0)
@@ -98,7 +97,7 @@ static unsigned long ingenic_ost_percpu_timer_recalc_rate(struct clk_hw *hw,
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prescale = readl (ost_clk -> ost -> base + info -> ostccr_reg );
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- prescale = ( prescale & OSTCCR_PRESCALE1_MASK ) >> OSTCCR_PRESCALE1_LSB ;
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+ prescale = FIELD_GET ( OSTCCR_PRESCALE1_MASK , prescale ) ;
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return parent_rate >> (prescale * 2 );
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}
@@ -112,7 +111,7 @@ static unsigned long ingenic_ost_global_timer_recalc_rate(struct clk_hw *hw,
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prescale = readl (ost_clk -> ost -> base + info -> ostccr_reg );
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- prescale = ( prescale & OSTCCR_PRESCALE2_MASK ) >> OSTCCR_PRESCALE2_LSB ;
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+ prescale = FIELD_GET ( OSTCCR_PRESCALE2_MASK , prescale ) ;
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return parent_rate >> (prescale * 2 );
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}
@@ -151,7 +150,8 @@ static int ingenic_ost_percpu_timer_set_rate(struct clk_hw *hw, unsigned long re
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int val ;
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val = readl (ost_clk -> ost -> base + info -> ostccr_reg );
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- val = (val & ~OSTCCR_PRESCALE1_MASK ) | (prescale << OSTCCR_PRESCALE1_LSB );
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+ val &= ~OSTCCR_PRESCALE1_MASK ;
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+ val |= FIELD_PREP (OSTCCR_PRESCALE1_MASK , prescale );
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writel (val , ost_clk -> ost -> base + info -> ostccr_reg );
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return 0 ;
@@ -166,7 +166,8 @@ static int ingenic_ost_global_timer_set_rate(struct clk_hw *hw, unsigned long re
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int val ;
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val = readl (ost_clk -> ost -> base + info -> ostccr_reg );
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- val = (val & ~OSTCCR_PRESCALE2_MASK ) | (prescale << OSTCCR_PRESCALE2_LSB );
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+ val &= ~OSTCCR_PRESCALE2_MASK ;
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+ val |= FIELD_PREP (OSTCCR_PRESCALE2_MASK , prescale );
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writel (val , ost_clk -> ost -> base + info -> ostccr_reg );
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return 0 ;
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