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Merge tag 'irqchip-5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/core
Pull irqchip updates from Marc Zyngier: - Revamped the irqdomain internals to consistently cache irqdata - Expose a new API to simplify IRQ handling involving an irqdomain by not using the IRQ number - Convert all the irqchip drivers to this new API - Allow the Qualcomm PDC driver to be compiled as a module - Fix HiSi MBIGEN compile warning when CONFIG_ACPI isn't selected - Remove a bunch of spurious printks on error paths - The obligatory couple of DT updates
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Documentation/admin-guide/sysctl/kernel.rst

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@@ -1458,11 +1458,22 @@ unprivileged_bpf_disabled
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=========================
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Writing 1 to this entry will disable unprivileged calls to ``bpf()``;
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once disabled, calling ``bpf()`` without ``CAP_SYS_ADMIN`` will return
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``-EPERM``.
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once disabled, calling ``bpf()`` without ``CAP_SYS_ADMIN`` or ``CAP_BPF``
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will return ``-EPERM``. Once set to 1, this can't be cleared from the
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running kernel anymore.
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Once set, this can't be cleared.
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Writing 2 to this entry will also disable unprivileged calls to ``bpf()``,
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however, an admin can still change this setting later on, if needed, by
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writing 0 or 1 to this entry.
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If ``BPF_UNPRIV_DEFAULT_OFF`` is enabled in the kernel config, then this
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entry will default to 2 instead of 0.
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= =============================================================
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0 Unprivileged calls to ``bpf()`` are enabled
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1 Unprivileged calls to ``bpf()`` are disabled without recovery
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2 Unprivileged calls to ``bpf()`` are disabled
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= =============================================================
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watchdog
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========

Documentation/core-api/irq/irq-domain.rst

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@@ -146,7 +146,6 @@ Legacy
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irq_domain_add_simple()
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irq_domain_add_legacy()
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irq_domain_add_legacy_isa()
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irq_domain_create_simple()
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irq_domain_create_legacy()
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Documentation/devicetree/bindings/clock/idt,versaclock5.yaml

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maxItems: 2
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idt,xtal-load-femtofarads:
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$ref: /schemas/types.yaml#/definitions/uint32
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minimum: 9000
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maximum: 22760
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description: Optional load capacitor for XTAL1 and XTAL2
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enum: [ 1800000, 2500000, 3300000 ]
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idt,slew-percent:
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description: The Slew rate control for CMOS single-ended.
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$ref: /schemas/types.yaml#/definitions/uint32
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enum: [ 80, 85, 90, 100 ]
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required:

Documentation/devicetree/bindings/i2c/i2c-mpc.yaml

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description: |
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I2C bus timeout in microseconds
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fsl,i2c-erratum-a004447:
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$ref: /schemas/types.yaml#/definitions/flag
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description: |
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Indicates the presence of QorIQ erratum A-004447, which
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says that the standard i2c recovery scheme mechanism does
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not work and an alternate implementation is needed.
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required:
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- compatible
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- reg

Documentation/devicetree/bindings/iio/adc/st,stm32-dfsdm-adc.yaml

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st,adc-channel-names:
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description: List of single-ended channel names.
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$ref: /schemas/types.yaml#/definitions/string-array
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st,filter-order:
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description: |

Documentation/devicetree/bindings/input/input.yaml

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Duration in seconds which the key should be kept pressed for device to
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reset automatically. Device with key pressed reset feature can specify
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this property.
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$ref: /schemas/types.yaml#/definitions/uint32
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additionalProperties: true

Documentation/devicetree/bindings/interconnect/qcom,rpmh.yaml

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this interconnect to send RPMh commands.
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qcom,bcm-voter-names:
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$ref: /schemas/types.yaml#/definitions/string-array
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description: |
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Names for each of the qcom,bcm-voters specified.
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Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml

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required:
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- affinity
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clocks:
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maxItems: 1
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clock-names:
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items:
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- const: aclk
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power-domains:
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maxItems: 1
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resets:
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maxItems: 1
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dependencies:
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mbi-ranges: [ msi-controller ]
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msi-controller: [ mbi-ranges ]

Documentation/devicetree/bindings/interrupt-controller/renesas,irqc.yaml

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- renesas,intc-ex-r8a774c0 # RZ/G2E
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- renesas,intc-ex-r8a7795 # R-Car H3
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- renesas,intc-ex-r8a7796 # R-Car M3-W
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- renesas,intc-ex-r8a77961 # R-Car M3-W+
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- renesas,intc-ex-r8a77965 # R-Car M3-N
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- renesas,intc-ex-r8a77970 # R-Car V3M
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- renesas,intc-ex-r8a77980 # R-Car V3H

Documentation/devicetree/bindings/leds/leds-bcm6328.txt

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In these SoCs it's possible to control LEDs both as GPIOs or by hardware.
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However, on some devices there are Serial LEDs (LEDs connected to a 74x164
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controller), which can either be controlled by software (exporting the 74x164
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as spi-gpio. See Documentation/devicetree/bindings/gpio/gpio-74x164.txt), or
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by hardware using this driver.
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as spi-gpio. See Documentation/devicetree/bindings/gpio/fairchild,74hc595.yaml),
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or by hardware using this driver.
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Some of these Serial LEDs are hardware controlled (e.g. ethernet LEDs) and
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exporting the 74x164 as spi-gpio prevents those LEDs to be hardware
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controlled, so the only chance to keep them working is by using this driver.

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