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xdarklightbebarino
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clk: divider: Implement and wire up .determine_rate by default
.determine_rate is meant to replace .round_rate. The former comes with a benefit which is especially relevant on 32-bit systems: since .determine_rate uses an "unsigned long" (compared to a "signed long" which is used by .round_rate) the maximum value on 32-bit systems increases from 2^31 (or approx. 2.14GHz) to 2^32 (or approx. 4.29GHz). Implement .determine_rate in addition to .round_rate so drivers that are using clk_divider_{ro_,}ops can benefit from this by default. Keep the .round_rate callback for now since some drivers rely on clk_divider_ops.round_rate being implemented. Signed-off-by: Martin Blumenstingl <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Stephen Boyd <[email protected]>
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drivers/clk/clk-divider.c

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@@ -446,6 +446,27 @@ static long clk_divider_round_rate(struct clk_hw *hw, unsigned long rate,
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divider->width, divider->flags);
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}
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static int clk_divider_determine_rate(struct clk_hw *hw,
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struct clk_rate_request *req)
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{
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struct clk_divider *divider = to_clk_divider(hw);
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/* if read only, just return current value */
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if (divider->flags & CLK_DIVIDER_READ_ONLY) {
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u32 val;
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val = clk_div_readl(divider) >> divider->shift;
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val &= clk_div_mask(divider->width);
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return divider_ro_determine_rate(hw, req, divider->table,
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divider->width,
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divider->flags, val);
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}
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return divider_determine_rate(hw, req, divider->table, divider->width,
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divider->flags);
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}
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int divider_get_val(unsigned long rate, unsigned long parent_rate,
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const struct clk_div_table *table, u8 width,
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unsigned long flags)
@@ -501,13 +522,15 @@ static int clk_divider_set_rate(struct clk_hw *hw, unsigned long rate,
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const struct clk_ops clk_divider_ops = {
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.recalc_rate = clk_divider_recalc_rate,
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.round_rate = clk_divider_round_rate,
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.determine_rate = clk_divider_determine_rate,
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.set_rate = clk_divider_set_rate,
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};
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EXPORT_SYMBOL_GPL(clk_divider_ops);
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const struct clk_ops clk_divider_ro_ops = {
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.recalc_rate = clk_divider_recalc_rate,
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.round_rate = clk_divider_round_rate,
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.determine_rate = clk_divider_determine_rate,
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};
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EXPORT_SYMBOL_GPL(clk_divider_ro_ops);
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