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Alex Elderkuba-moo
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net: ipa: fix inter-EE IRQ register definitions
In gsi_irq_setup(), two registers are written with the intention of disabling inter-EE channel and event IRQs. But the wrong registers are used (and defined); the ones used are read-only registers that indicate whether the interrupt condition is present. Define the mask registers instead of the status registers, and use them to disable the inter-EE interrupt types. Fixes: 46f748c ("net: ipa: explicitly disallow inter-EE interrupts") Signed-off-by: Alex Elder <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
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lines changed

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+11
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lines changed

drivers/net/ipa/gsi.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -211,8 +211,8 @@ static void gsi_irq_setup(struct gsi *gsi)
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iowrite32(0, gsi->virt + GSI_CNTXT_SRC_IEOB_IRQ_MSK_OFFSET);
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/* The inter-EE registers are in the non-adjusted address range */
214-
iowrite32(0, gsi->virt_raw + GSI_INTER_EE_SRC_CH_IRQ_OFFSET);
215-
iowrite32(0, gsi->virt_raw + GSI_INTER_EE_SRC_EV_CH_IRQ_OFFSET);
214+
iowrite32(0, gsi->virt_raw + GSI_INTER_EE_SRC_CH_IRQ_MSK_OFFSET);
215+
iowrite32(0, gsi->virt_raw + GSI_INTER_EE_SRC_EV_CH_IRQ_MSK_OFFSET);
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iowrite32(0, gsi->virt + GSI_CNTXT_GSI_IRQ_EN_OFFSET);
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}

drivers/net/ipa/gsi_reg.h

Lines changed: 9 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -53,15 +53,15 @@
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#define GSI_EE_REG_ADJUST 0x0000d000 /* IPA v4.5+ */
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/* The two inter-EE IRQ register offsets are relative to gsi->virt_raw */
56-
#define GSI_INTER_EE_SRC_CH_IRQ_OFFSET \
57-
GSI_INTER_EE_N_SRC_CH_IRQ_OFFSET(GSI_EE_AP)
58-
#define GSI_INTER_EE_N_SRC_CH_IRQ_OFFSET(ee) \
59-
(0x0000c018 + 0x1000 * (ee))
60-
61-
#define GSI_INTER_EE_SRC_EV_CH_IRQ_OFFSET \
62-
GSI_INTER_EE_N_SRC_EV_CH_IRQ_OFFSET(GSI_EE_AP)
63-
#define GSI_INTER_EE_N_SRC_EV_CH_IRQ_OFFSET(ee) \
64-
(0x0000c01c + 0x1000 * (ee))
56+
#define GSI_INTER_EE_SRC_CH_IRQ_MSK_OFFSET \
57+
GSI_INTER_EE_N_SRC_CH_IRQ_MSK_OFFSET(GSI_EE_AP)
58+
#define GSI_INTER_EE_N_SRC_CH_IRQ_MSK_OFFSET(ee) \
59+
(0x0000c020 + 0x1000 * (ee))
60+
61+
#define GSI_INTER_EE_SRC_EV_CH_IRQ_MSK_OFFSET \
62+
GSI_INTER_EE_N_SRC_EV_CH_IRQ_MSK_OFFSET(GSI_EE_AP)
63+
#define GSI_INTER_EE_N_SRC_EV_CH_IRQ_MSK_OFFSET(ee) \
64+
(0x0000c024 + 0x1000 * (ee))
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/* All other register offsets are relative to gsi->virt */
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