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rmurphy-armjoergroedel
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iommu/vt-d: Prepare for multiple DMA domain types
In preparation for the strict vs. non-strict decision for DMA domains to be expressed in the domain type, make sure we expose our flush queue awareness by accepting the new domain type, and test the specific feature flag where we want to identify DMA domains in general. The DMA ops reset/setup can simply be made unconditional, since iommu-dma already knows only to touch DMA domains. Reviewed-by: Lu Baolu <[email protected]> Signed-off-by: Robin Murphy <[email protected]> Link: https://lore.kernel.org/r/31a8ef868d593a2f3826a6a120edee81815375a7.1628682049.git.robin.murphy@arm.com Signed-off-by: Joerg Roedel <[email protected]>
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drivers/iommu/intel/iommu.c

Lines changed: 6 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -582,7 +582,7 @@ struct intel_iommu *domain_get_iommu(struct dmar_domain *domain)
582582
int iommu_id;
583583

584584
/* si_domain and vm domain should not get here. */
585-
if (WARN_ON(domain->domain.type != IOMMU_DOMAIN_DMA))
585+
if (WARN_ON(!iommu_is_dma_domain(&domain->domain)))
586586
return NULL;
587587

588588
for_each_domain_iommu(iommu_id, domain)
@@ -1034,7 +1034,7 @@ static struct dma_pte *pfn_to_dma_pte(struct dmar_domain *domain,
10341034
pteval = ((uint64_t)virt_to_dma_pfn(tmp_page) << VTD_PAGE_SHIFT) | DMA_PTE_READ | DMA_PTE_WRITE;
10351035
if (domain_use_first_level(domain)) {
10361036
pteval |= DMA_FL_PTE_XD | DMA_FL_PTE_US;
1037-
if (domain->domain.type == IOMMU_DOMAIN_DMA)
1037+
if (iommu_is_dma_domain(&domain->domain))
10381038
pteval |= DMA_FL_PTE_ACCESS;
10391039
}
10401040
if (cmpxchg64(&pte->val, 0ULL, pteval))
@@ -2345,7 +2345,7 @@ __domain_mapping(struct dmar_domain *domain, unsigned long iov_pfn,
23452345
if (domain_use_first_level(domain)) {
23462346
attr |= DMA_FL_PTE_XD | DMA_FL_PTE_US;
23472347

2348-
if (domain->domain.type == IOMMU_DOMAIN_DMA) {
2348+
if (iommu_is_dma_domain(&domain->domain)) {
23492349
attr |= DMA_FL_PTE_ACCESS;
23502350
if (prot & DMA_PTE_WRITE)
23512351
attr |= DMA_FL_PTE_DIRTY;
@@ -4528,6 +4528,7 @@ static struct iommu_domain *intel_iommu_domain_alloc(unsigned type)
45284528

45294529
switch (type) {
45304530
case IOMMU_DOMAIN_DMA:
4531+
case IOMMU_DOMAIN_DMA_FQ:
45314532
case IOMMU_DOMAIN_UNMANAGED:
45324533
dmar_domain = alloc_domain(0);
45334534
if (!dmar_domain) {
@@ -5197,12 +5198,8 @@ static void intel_iommu_release_device(struct device *dev)
51975198

51985199
static void intel_iommu_probe_finalize(struct device *dev)
51995200
{
5200-
struct iommu_domain *domain = iommu_get_domain_for_dev(dev);
5201-
5202-
if (domain && domain->type == IOMMU_DOMAIN_DMA)
5203-
iommu_setup_dma_ops(dev, 0, U64_MAX);
5204-
else
5205-
set_dma_ops(dev, NULL);
5201+
set_dma_ops(dev, NULL);
5202+
iommu_setup_dma_ops(dev, 0, U64_MAX);
52065203
}
52075204

52085205
static void intel_iommu_get_resv_regions(struct device *device,

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