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Po-Ting Chenalexdeucher
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drm/amd/display: Add swizzle visual confirm mode
[Why] To support a new visual confirm mode: swizzle to show the specific color at the screen border according to different surface swizzle mode. Currently we only support the Linear mode with red color. Signed-off-by: Po-Ting Chen <[email protected]> Acked-by: Stylon Wang <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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lines changed

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drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

Lines changed: 21 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -403,3 +403,24 @@ void get_hdr_visual_confirm_color(
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break;
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}
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}
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void get_surface_tile_visual_confirm_color(
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struct pipe_ctx *pipe_ctx,
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struct tg_color *color)
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{
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uint32_t color_value = MAX_TG_COLOR_VALUE;
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/* Determine the overscan color based on the top-most (desktop) plane's context */
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struct pipe_ctx *top_pipe_ctx = pipe_ctx;
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while (top_pipe_ctx->top_pipe != NULL)
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top_pipe_ctx = top_pipe_ctx->top_pipe;
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switch (top_pipe_ctx->plane_state->tiling_info.gfx9.swizzle) {
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case DC_SW_LINEAR:
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/* LINEAR Surface - set border color to red */
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color->color_r_cr = color_value;
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break;
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default:
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break;
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}
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}

drivers/gpu/drm/amd/display/dc/dc.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -318,6 +318,7 @@ enum visual_confirm {
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VISUAL_CONFIRM_HDR = 2,
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VISUAL_CONFIRM_MPCTREE = 4,
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VISUAL_CONFIRM_PSR = 5,
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VISUAL_CONFIRM_SWIZZLE = 9,
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};
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enum dcc_option {

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2433,6 +2433,8 @@ void dcn10_update_visual_confirm_color(struct dc *dc, struct pipe_ctx *pipe_ctx,
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get_hdr_visual_confirm_color(pipe_ctx, color);
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else if (dc->debug.visual_confirm == VISUAL_CONFIRM_SURFACE)
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get_surface_visual_confirm_color(pipe_ctx, color);
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else if (dc->debug.visual_confirm == VISUAL_CONFIRM_SWIZZLE)
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get_surface_tile_visual_confirm_color(pipe_ctx, color);
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else
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color_space_to_black_color(
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dc, pipe_ctx->stream->output_color_space, color);

drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2290,6 +2290,8 @@ void dcn20_update_visual_confirm_color(struct dc *dc, struct pipe_ctx *pipe_ctx,
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get_surface_visual_confirm_color(pipe_ctx, color);
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else if (dc->debug.visual_confirm == VISUAL_CONFIRM_MPCTREE)
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get_mpctree_visual_confirm_color(pipe_ctx, color);
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else if (dc->debug.visual_confirm == VISUAL_CONFIRM_SWIZZLE)
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get_surface_tile_visual_confirm_color(pipe_ctx, color);
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if (mpc->funcs->set_bg_color)
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mpc->funcs->set_bg_color(mpc, color, mpcc_id);

drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -268,5 +268,7 @@ void get_hdr_visual_confirm_color(
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void get_mpctree_visual_confirm_color(
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struct pipe_ctx *pipe_ctx,
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struct tg_color *color);
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void get_surface_tile_visual_confirm_color(
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struct pipe_ctx *pipe_ctx,
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struct tg_color *color);
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#endif /* __DC_HW_SEQUENCER_H__ */

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