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clk: ti: omap5: Add missing gpmc and ocmc clkctrl
The gpmc clock is needed to update omap5 to boot with genpd with the related devicetree patches. The ocmc clock is currently not used but let's add it so we have all the clocks for the l3main2 defined. Cc: Stephen Boyd <[email protected]> Cc: Tero Kristo <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
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drivers/clk/ti/clk-54xx.c

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@@ -156,6 +156,8 @@ static const struct omap_clkctrl_reg_data omap5_l3main1_clkctrl_regs[] __initcon
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static const struct omap_clkctrl_reg_data omap5_l3main2_clkctrl_regs[] __initconst = {
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{ OMAP5_L3_MAIN_2_CLKCTRL, NULL, 0, "l3_iclk_div" },
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{ OMAP5_L3_MAIN_2_GPMC_CLKCTRL, NULL, CLKF_HW_SUP, "l3_iclk_div" },
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{ OMAP5_L3_MAIN_2_OCMC_RAM_CLKCTRL, NULL, CLKF_HW_SUP, "l3_iclk_div" },
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{ 0 },
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};
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include/dt-bindings/clock/omap5.h

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@@ -32,6 +32,8 @@
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/* l3main2 clocks */
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#define OMAP5_L3_MAIN_2_CLKCTRL OMAP5_CLKCTRL_INDEX(0x20)
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#define OMAP5_L3_MAIN_2_GPMC_CLKCTRL OMAP5_CLKCTRL_INDEX(0x28)
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#define OMAP5_L3_MAIN_2_OCMC_RAM_CLKCTRL OMAP5_CLKCTRL_INDEX(0x30)
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/* ipu clocks */
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#define OMAP5_MMU_IPU_CLKCTRL OMAP5_CLKCTRL_INDEX(0x20)

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