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Merge series "ASoC: mediatek: Add support for MT8195 SoC" from Trevor Wu <[email protected]>:
This series of patches adds support for Mediatek AFE of MT8195 SoC. Patches are based on broonie tree "for-next" branch. Changes since v4: - removed sof related code Changes since v3: - fixed warnings found by kernel test robot - removed unused critical section - corrected the lock protected sections on etdm driver - added DPTX and HDMITX audio support Changes since v2: - added audio clock gate control - added 'mediatek' prefix to private dts properties - added consumed clocks to dt-bindins and adopted suggestions from Rob - refined clock usage and remove unused clock and control code - fixed typos Changes since v1: - fixed some problems related to dt-bindings - added some missing properties to dt-bindings - added depency declaration on dt-bindings - fixed some warnings found by kernel test robot Trevor Wu (11): ASoC: mediatek: mt8195: update mediatek common driver ASoC: mediatek: mt8195: support audsys clock control ASoC: mediatek: mt8195: support etdm in platform driver ASoC: mediatek: mt8195: support adda in platform driver ASoC: mediatek: mt8195: support pcm in platform driver ASoC: mediatek: mt8195: add platform driver dt-bindings: mediatek: mt8195: add audio afe document ASoC: mediatek: mt8195: add machine driver with mt6359, rt1019 and rt5682 ASoC: mediatek: mt8195: add DPTX audio support ASoC: mediatek: mt8195: add HDMITX audio support dt-bindings: mediatek: mt8195: add mt8195-mt6359-rt1019-rt5682 document .../bindings/sound/mt8195-afe-pcm.yaml | 184 + .../sound/mt8195-mt6359-rt1019-rt5682.yaml | 47 + sound/soc/mediatek/Kconfig | 24 + sound/soc/mediatek/Makefile | 1 + sound/soc/mediatek/common/mtk-afe-fe-dai.c | 22 +- sound/soc/mediatek/common/mtk-base-afe.h | 10 +- sound/soc/mediatek/mt8195/Makefile | 15 + sound/soc/mediatek/mt8195/mt8195-afe-clk.c | 441 +++ sound/soc/mediatek/mt8195/mt8195-afe-clk.h | 109 + sound/soc/mediatek/mt8195/mt8195-afe-common.h | 158 + sound/soc/mediatek/mt8195/mt8195-afe-pcm.c | 3281 +++++++++++++++++ sound/soc/mediatek/mt8195/mt8195-audsys-clk.c | 214 ++ sound/soc/mediatek/mt8195/mt8195-audsys-clk.h | 15 + .../soc/mediatek/mt8195/mt8195-audsys-clkid.h | 93 + sound/soc/mediatek/mt8195/mt8195-dai-adda.c | 830 +++++ sound/soc/mediatek/mt8195/mt8195-dai-etdm.c | 2639 +++++++++++++ sound/soc/mediatek/mt8195/mt8195-dai-pcm.c | 389 ++ .../mt8195/mt8195-mt6359-rt1019-rt5682.c | 1087 ++++++ sound/soc/mediatek/mt8195/mt8195-reg.h | 2796 ++++++++++++++ 19 files changed, 12350 insertions(+), 5 deletions(-) create mode 100644 Documentation/devicetree/bindings/sound/mt8195-afe-pcm.yaml create mode 100644 Documentation/devicetree/bindings/sound/mt8195-mt6359-rt1019-rt5682.yaml create mode 100644 sound/soc/mediatek/mt8195/Makefile create mode 100644 sound/soc/mediatek/mt8195/mt8195-afe-clk.c create mode 100644 sound/soc/mediatek/mt8195/mt8195-afe-clk.h create mode 100644 sound/soc/mediatek/mt8195/mt8195-afe-common.h create mode 100644 sound/soc/mediatek/mt8195/mt8195-afe-pcm.c create mode 100644 sound/soc/mediatek/mt8195/mt8195-audsys-clk.c create mode 100644 sound/soc/mediatek/mt8195/mt8195-audsys-clk.h create mode 100644 sound/soc/mediatek/mt8195/mt8195-audsys-clkid.h create mode 100644 sound/soc/mediatek/mt8195/mt8195-dai-adda.c create mode 100644 sound/soc/mediatek/mt8195/mt8195-dai-etdm.c create mode 100644 sound/soc/mediatek/mt8195/mt8195-dai-pcm.c create mode 100644 sound/soc/mediatek/mt8195/mt8195-mt6359-rt1019-rt5682.c create mode 100644 sound/soc/mediatek/mt8195/mt8195-reg.h -- 2.18.0
2 parents 0be10d7 + 5f8c991 commit 88939e7

19 files changed

+12350
-5
lines changed

‎Documentation/devicetree/bindings/sound/mt8195-afe-pcm.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/sound/mt8195-afe-pcm.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Mediatek AFE PCM controller for mt8195
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maintainers:
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- Trevor Wu <[email protected]>
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properties:
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compatible:
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const: mediatek,mt8195-audio
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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mediatek,topckgen:
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$ref: "/schemas/types.yaml#/definitions/phandle"
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description: The phandle of the mediatek topckgen controller
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power-domains:
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maxItems: 1
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clocks:
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items:
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- description: 26M clock
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- description: audio pll1 clock
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- description: audio pll2 clock
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- description: clock divider for i2si1_mck
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- description: clock divider for i2si2_mck
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- description: clock divider for i2so1_mck
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- description: clock divider for i2so2_mck
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- description: clock divider for dptx_mck
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- description: a1sys hoping clock
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- description: audio intbus clock
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- description: audio hires clock
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- description: audio local bus clock
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- description: mux for dptx_mck
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- description: mux for i2so1_mck
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- description: mux for i2so2_mck
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- description: mux for i2si1_mck
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- description: mux for i2si2_mck
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- description: audio infra 26M clock
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- description: infra bus clock
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clock-names:
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items:
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- const: clk26m
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- const: apll1_ck
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- const: apll2_ck
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- const: apll12_div0
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- const: apll12_div1
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- const: apll12_div2
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- const: apll12_div3
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- const: apll12_div9
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- const: a1sys_hp_sel
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- const: aud_intbus_sel
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- const: audio_h_sel
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- const: audio_local_bus_sel
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- const: dptx_m_sel
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- const: i2so1_m_sel
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- const: i2so2_m_sel
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- const: i2si1_m_sel
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- const: i2si2_m_sel
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- const: infra_ao_audio_26m_b
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- const: scp_adsp_audiodsp
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mediatek,etdm-in1-chn-disabled:
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$ref: /schemas/types.yaml#/definitions/uint8-array
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maxItems: 24
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description: Specify which input channel should be disabled.
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mediatek,etdm-in2-chn-disabled:
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$ref: /schemas/types.yaml#/definitions/uint8-array
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maxItems: 16
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description: Specify which input channel should be disabled.
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patternProperties:
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"^mediatek,etdm-in[1-2]-mclk-always-on-rate-hz$":
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description: Specify etdm in mclk output rate for always on case.
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"^mediatek,etdm-out[1-3]-mclk-always-on-rate-hz$":
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description: Specify etdm out mclk output rate for always on case.
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"^mediatek,etdm-in[1-2]-multi-pin-mode$":
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type: boolean
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description: if present, the etdm data mode is I2S.
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"^mediatek,etdm-out[1-3]-multi-pin-mode$":
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type: boolean
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description: if present, the etdm data mode is I2S.
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"^mediatek,etdm-in[1-2]-cowork-source$":
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$ref: /schemas/types.yaml#/definitions/uint32
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description: |
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etdm modules can share the same external clock pin. Specify
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which etdm clock source is required by this etdm in moudule.
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enum:
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- 0 # etdm1_in
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- 1 # etdm2_in
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- 2 # etdm1_out
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- 3 # etdm2_out
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"^mediatek,etdm-out[1-2]-cowork-source$":
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$ref: /schemas/types.yaml#/definitions/uint32
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description: |
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etdm modules can share the same external clock pin. Specify
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which etdm clock source is required by this etdm out moudule.
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enum:
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- 0 # etdm1_in
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- 1 # etdm2_in
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- 2 # etdm1_out
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- 3 # etdm2_out
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required:
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- compatible
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- reg
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- interrupts
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- mediatek,topckgen
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- power-domains
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- clocks
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- clock-names
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/mt8195-clk.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/power/mt8195-power.h>
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afe: mt8195-afe-pcm@10890000 {
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compatible = "mediatek,mt8195-audio";
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reg = <0x10890000 0x10000>;
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interrupts = <GIC_SPI 822 IRQ_TYPE_LEVEL_HIGH 0>;
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mediatek,topckgen = <&topckgen>;
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power-domains = <&spm MT8195_POWER_DOMAIN_AUDIO>;
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clocks = <&clk26m>,
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<&topckgen CLK_TOP_APLL1>,
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<&topckgen CLK_TOP_APLL2>,
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<&topckgen CLK_TOP_APLL12_DIV0>,
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<&topckgen CLK_TOP_APLL12_DIV1>,
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<&topckgen CLK_TOP_APLL12_DIV2>,
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<&topckgen CLK_TOP_APLL12_DIV3>,
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<&topckgen CLK_TOP_APLL12_DIV9>,
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<&topckgen CLK_TOP_A1SYS_HP_SEL>,
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<&topckgen CLK_TOP_AUD_INTBUS_SEL>,
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<&topckgen CLK_TOP_AUDIO_H_SEL>,
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<&topckgen CLK_TOP_AUDIO_LOCAL_BUS_SEL>,
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<&topckgen CLK_TOP_DPTX_M_SEL>,
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<&topckgen CLK_TOP_I2SO1_M_SEL>,
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<&topckgen CLK_TOP_I2SO2_M_SEL>,
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<&topckgen CLK_TOP_I2SI1_M_SEL>,
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<&topckgen CLK_TOP_I2SI2_M_SEL>,
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<&infracfg_ao CLK_INFRA_AO_AUDIO_26M_B>,
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<&scp_adsp CLK_SCP_ADSP_AUDIODSP>;
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clock-names = "clk26m",
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"apll1_ck",
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"apll2_ck",
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"apll12_div0",
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"apll12_div1",
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"apll12_div2",
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"apll12_div3",
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"apll12_div9",
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"a1sys_hp_sel",
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"aud_intbus_sel",
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"audio_h_sel",
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"audio_local_bus_sel",
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"dptx_m_sel",
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"i2so1_m_sel",
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"i2so2_m_sel",
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"i2si1_m_sel",
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"i2si2_m_sel",
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"infra_ao_audio_26m_b",
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"scp_adsp_audiodsp";
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};
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...

‎Documentation/devicetree/bindings/sound/mt8195-mt6359-rt1019-rt5682.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/sound/mt8195-mt6359-rt1019-rt5682.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Mediatek MT8195 with MT6359, RT1019 and RT5682 ASoC sound card driver
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maintainers:
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- Trevor Wu <[email protected]>
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description:
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This binding describes the MT8195 sound card.
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properties:
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compatible:
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const: mediatek,mt8195_mt6359_rt1019_rt5682
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mediatek,platform:
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$ref: "/schemas/types.yaml#/definitions/phandle"
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description: The phandle of MT8195 ASoC platform.
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mediatek,dptx-codec:
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$ref: "/schemas/types.yaml#/definitions/phandle"
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description: The phandle of MT8195 Display Port Tx codec node.
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mediatek,hdmi-codec:
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$ref: "/schemas/types.yaml#/definitions/phandle"
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description: The phandle of MT8195 HDMI codec node.
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additionalProperties: false
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required:
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- compatible
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- mediatek,platform
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examples:
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- |
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sound: mt8195-sound {
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compatible = "mediatek,mt8195_mt6359_rt1019_rt5682";
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mediatek,platform = <&afe>;
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pinctrl-names = "default";
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pinctrl-0 = <&aud_pins_default>;
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};
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...

‎sound/soc/mediatek/Kconfig

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@@ -184,3 +184,27 @@ config SND_SOC_MT8192_MT6359_RT1015_RT5682
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with the MT6359 RT1015 RT5682 audio codec.
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Select Y if you have such device.
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If unsure select "N".
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config SND_SOC_MT8195
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tristate "ASoC support for Mediatek MT8195 chip"
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select SND_SOC_MEDIATEK
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help
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This adds ASoC platform driver support for Mediatek MT8195 chip
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that can be used with other codecs.
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Select Y if you have such device.
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If unsure select "N".
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config SND_SOC_MT8195_MT6359_RT1019_RT5682
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tristate "ASoC Audio driver for MT8195 with MT6359 RT1019 RT5682 codec"
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depends on I2C
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depends on SND_SOC_MT8195
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select SND_SOC_MT6359
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select SND_SOC_RT1015P
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select SND_SOC_RT5682_I2C
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select SND_SOC_DMIC
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select SND_SOC_HDMI_CODEC
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help
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This adds ASoC driver for Mediatek MT8195 boards
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with the MT6359 RT1019 RT5682 audio codec.
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Select Y if you have such device.
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If unsure select "N".

‎sound/soc/mediatek/Makefile

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@@ -5,3 +5,4 @@ obj-$(CONFIG_SND_SOC_MT6797) += mt6797/
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obj-$(CONFIG_SND_SOC_MT8173) += mt8173/
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obj-$(CONFIG_SND_SOC_MT8183) += mt8183/
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obj-$(CONFIG_SND_SOC_MT8192) += mt8192/
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obj-$(CONFIG_SND_SOC_MT8195) += mt8195/

‎sound/soc/mediatek/common/mtk-afe-fe-dai.c

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@@ -139,7 +139,7 @@ int mtk_afe_fe_hw_params(struct snd_pcm_substream *substream,
139139
substream->runtime->dma_area,
140140
substream->runtime->dma_bytes);
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142-
memset_io(substream->runtime->dma_area, 0,
142+
memset_io((void __force __iomem *)substream->runtime->dma_area, 0,
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substream->runtime->dma_bytes);
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145145
/* set addr */
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433433
phys_buf_addr_upper_32);
434434
}
435435

436-
/* set MSB to 33-bit */
437-
if (memif->data->msb_reg >= 0)
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/*
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* set MSB to 33-bit, for memif address
438+
* only for memif base address, if msb_end_reg exists
439+
*/
440+
if (memif->data->msb_reg)
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mtk_regmap_update_bits(afe->regmap, memif->data->msb_reg,
439442
1, msb_at_bit33, memif->data->msb_shift);
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444+
/* set MSB to 33-bit, for memif end address */
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if (memif->data->msb_end_reg)
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mtk_regmap_update_bits(afe->regmap, memif->data->msb_end_reg,
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1, msb_at_bit33,
448+
memif->data->msb_end_shift);
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441450
return 0;
442451
}
443452
EXPORT_SYMBOL_GPL(mtk_memif_set_addr);
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else
465474
mono = (channel == 1) ? 1 : 0;
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476+
/* for specific configuration of memif mono mode */
477+
if (memif->data->int_odd_flag_reg)
478+
mtk_regmap_update_bits(afe->regmap,
479+
memif->data->int_odd_flag_reg,
480+
1, mono,
481+
memif->data->int_odd_flag_shift);
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467483
return mtk_regmap_update_bits(afe->regmap, memif->data->mono_reg,
468484
1, mono, memif->data->mono_shift);
469485
}

‎sound/soc/mediatek/common/mtk-base-afe.h

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@@ -29,6 +29,8 @@ struct mtk_base_memif_data {
2929
int quad_ch_reg;
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int quad_ch_mask;
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int quad_ch_shift;
32+
int int_odd_flag_reg;
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int int_odd_flag_shift;
3234
int enable_reg;
3335
int enable_shift;
3436
int hd_reg;
@@ -37,10 +39,13 @@ struct mtk_base_memif_data {
3739
int hd_align_mshift;
3840
int msb_reg;
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int msb_shift;
40-
int msb2_reg;
41-
int msb2_shift;
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int msb_end_reg;
43+
int msb_end_shift;
4244
int agent_disable_reg;
4345
int agent_disable_shift;
46+
int ch_num_reg;
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int ch_num_shift;
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int ch_num_maskbit;
4449
/* playback memif only */
4550
int pbuf_reg;
4651
int pbuf_mask;
@@ -62,6 +67,7 @@ struct mtk_base_irq_data {
6267
int irq_en_shift;
6368
int irq_clr_reg;
6469
int irq_clr_shift;
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int irq_status_shift;
6571
};
6672

6773
struct device;

‎sound/soc/mediatek/mt8195/Makefile

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# SPDX-License-Identifier: GPL-2.0
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# platform driver
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snd-soc-mt8195-afe-objs := \
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mt8195-audsys-clk.o \
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mt8195-afe-clk.o \
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mt8195-afe-pcm.o \
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mt8195-dai-adda.o \
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mt8195-dai-etdm.o \
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mt8195-dai-pcm.o
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12+
obj-$(CONFIG_SND_SOC_MT8195) += snd-soc-mt8195-afe.o
13+
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# machine driver
15+
obj-$(CONFIG_SND_SOC_MT8195_MT6359_RT1019_RT5682) += mt8195-mt6359-rt1019-rt5682.o

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