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drm/i915/display: Fix fastsets involving PSR
Commit 78b772e ("drm/i915/display: Fill PSR state during hardware configuration read out") is not allowing fastsets to happen when PSR states changes but PSR is a feature that can be enabled and disabled during fastsets. So here moving the PSR pipe conf checks to a block that is only executed when checking if HW state matches with requested state, not during the phase where it checks if fastset is possible or not. There still a state mismatch not allowing fastsets between states turning off or on PSR because of crtc_state->infoframes.enable BIT(DP_SDP_VSC) but at least for now it will allow a fastset between PSR1 <-> PSR2, that is a case heavilly used by CI due to pipe CRC not work with PSR2, but the remaning issue will be fixed in a future patch. Cc: Gwan-gyeong Mun <[email protected]> Cc: Radhakrishna Sripada <[email protected]> Reported-by: Ville Syrjälä <[email protected]> Fixes: 78b772e ("drm/i915/display: Fill PSR state during hardware configuration read out") Signed-off-by: José Roberto de Souza <[email protected]> Reviewed-by: Gwan-gyeong Mun <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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drivers/gpu/drm/i915/display/intel_display.c

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -8603,6 +8603,11 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
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bp_gamma = intel_color_get_gamma_bit_precision(pipe_config);
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if (bp_gamma)
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PIPE_CONF_CHECK_COLOR_LUT(gamma_mode, hw.gamma_lut, bp_gamma);
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8607+
PIPE_CONF_CHECK_BOOL(has_psr);
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PIPE_CONF_CHECK_BOOL(has_psr2);
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PIPE_CONF_CHECK_BOOL(enable_psr2_sel_fetch);
8610+
PIPE_CONF_CHECK_I(dc3co_exitline);
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}
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PIPE_CONF_CHECK_BOOL(double_wide);
@@ -8687,11 +8692,6 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
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PIPE_CONF_CHECK_I(vrr.pipeline_full);
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PIPE_CONF_CHECK_I(vrr.guardband);
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8690-
PIPE_CONF_CHECK_BOOL(has_psr);
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PIPE_CONF_CHECK_BOOL(has_psr2);
8692-
PIPE_CONF_CHECK_BOOL(enable_psr2_sel_fetch);
8693-
PIPE_CONF_CHECK_I(dc3co_exitline);
8694-
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#undef PIPE_CONF_CHECK_X
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#undef PIPE_CONF_CHECK_I
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#undef PIPE_CONF_CHECK_BOOL

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