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Merge tag 'amd-drm-fixes-5.12-2021-02-24' of https://gitlab.freedesktop.org/agd5f/linux into drm-next
amd-drm-fixes-5.12-2021-02-24: amdgpu: - Clang warning fix - S0ix platform shutdown/poweroff fix - Misc display fixes Signed-off-by: Dave Airlie <[email protected]> From: Alex Deucher <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2 parents e81df5b + ea3b424 commit 9c712c9

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11 files changed

+158
-48
lines changed

11 files changed

+158
-48
lines changed

‎drivers/gpu/drm/amd/amdgpu/amdgpu.h

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1008,6 +1008,12 @@ struct amdgpu_device {
10081008
bool in_suspend;
10091009
bool in_hibernate;
10101010

1011+
/*
1012+
* The combination flag in_poweroff_reboot_com used to identify the poweroff
1013+
* and reboot opt in the s0i3 system-wide suspend.
1014+
*/
1015+
bool in_poweroff_reboot_com;
1016+
10111017
atomic_t in_gpu_reset;
10121018
enum pp_mp1_state mp1_state;
10131019
struct rw_semaphore reset_sem;

‎drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2678,7 +2678,8 @@ static int amdgpu_device_ip_suspend_phase1(struct amdgpu_device *adev)
26782678
{
26792679
int i, r;
26802680

2681-
if (!amdgpu_acpi_is_s0ix_supported(adev) || amdgpu_in_reset(adev)) {
2681+
if (adev->in_poweroff_reboot_com ||
2682+
!amdgpu_acpi_is_s0ix_supported(adev) || amdgpu_in_reset(adev)) {
26822683
amdgpu_device_set_pg_state(adev, AMD_PG_STATE_UNGATE);
26832684
amdgpu_device_set_cg_state(adev, AMD_CG_STATE_UNGATE);
26842685
}
@@ -3741,7 +3742,8 @@ int amdgpu_device_suspend(struct drm_device *dev, bool fbcon)
37413742

37423743
amdgpu_fence_driver_suspend(adev);
37433744

3744-
if (!amdgpu_acpi_is_s0ix_supported(adev) || amdgpu_in_reset(adev))
3745+
if (adev->in_poweroff_reboot_com ||
3746+
!amdgpu_acpi_is_s0ix_supported(adev) || amdgpu_in_reset(adev))
37453747
r = amdgpu_device_ip_suspend_phase2(adev);
37463748
else
37473749
amdgpu_gfx_state_change_set(adev, sGpuChangeState_D3Entry);

‎drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c

Lines changed: 8 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1270,7 +1270,9 @@ amdgpu_pci_shutdown(struct pci_dev *pdev)
12701270
*/
12711271
if (!amdgpu_passthrough(adev))
12721272
adev->mp1_state = PP_MP1_STATE_UNLOAD;
1273+
adev->in_poweroff_reboot_com = true;
12731274
amdgpu_device_ip_suspend(adev);
1275+
adev->in_poweroff_reboot_com = false;
12741276
adev->mp1_state = PP_MP1_STATE_NONE;
12751277
}
12761278

@@ -1312,8 +1314,13 @@ static int amdgpu_pmops_thaw(struct device *dev)
13121314
static int amdgpu_pmops_poweroff(struct device *dev)
13131315
{
13141316
struct drm_device *drm_dev = dev_get_drvdata(dev);
1317+
struct amdgpu_device *adev = drm_to_adev(drm_dev);
1318+
int r;
13151319

1316-
return amdgpu_device_suspend(drm_dev, true);
1320+
adev->in_poweroff_reboot_com = true;
1321+
r = amdgpu_device_suspend(drm_dev, true);
1322+
adev->in_poweroff_reboot_com = false;
1323+
return r;
13171324
}
13181325

13191326
static int amdgpu_pmops_restore(struct device *dev)

‎drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

Lines changed: 78 additions & 23 deletions
Original file line numberDiff line numberDiff line change
@@ -937,7 +937,49 @@ static void mmhub_read_system_context(struct amdgpu_device *adev, struct dc_phy_
937937

938938
}
939939
#endif
940+
#if defined(CONFIG_DRM_AMD_DC_DCN)
941+
static void event_mall_stutter(struct work_struct *work)
942+
{
943+
944+
struct vblank_workqueue *vblank_work = container_of(work, struct vblank_workqueue, mall_work);
945+
struct amdgpu_display_manager *dm = vblank_work->dm;
946+
947+
mutex_lock(&dm->dc_lock);
948+
949+
if (vblank_work->enable)
950+
dm->active_vblank_irq_count++;
951+
else
952+
dm->active_vblank_irq_count--;
953+
954+
955+
dc_allow_idle_optimizations(
956+
dm->dc, dm->active_vblank_irq_count == 0 ? true : false);
957+
958+
DRM_DEBUG_DRIVER("Allow idle optimizations (MALL): %d\n", dm->active_vblank_irq_count == 0);
940959

960+
961+
mutex_unlock(&dm->dc_lock);
962+
}
963+
964+
static struct vblank_workqueue *vblank_create_workqueue(struct amdgpu_device *adev, struct dc *dc)
965+
{
966+
967+
int max_caps = dc->caps.max_links;
968+
struct vblank_workqueue *vblank_work;
969+
int i = 0;
970+
971+
vblank_work = kcalloc(max_caps, sizeof(*vblank_work), GFP_KERNEL);
972+
if (ZERO_OR_NULL_PTR(vblank_work)) {
973+
kfree(vblank_work);
974+
return NULL;
975+
}
976+
977+
for (i = 0; i < max_caps; i++)
978+
INIT_WORK(&vblank_work[i].mall_work, event_mall_stutter);
979+
980+
return vblank_work;
981+
}
982+
#endif
941983
static int amdgpu_dm_init(struct amdgpu_device *adev)
942984
{
943985
struct dc_init_data init_data;
@@ -957,6 +999,9 @@ static int amdgpu_dm_init(struct amdgpu_device *adev)
957999

9581000
mutex_init(&adev->dm.dc_lock);
9591001
mutex_init(&adev->dm.audio_lock);
1002+
#if defined(CONFIG_DRM_AMD_DC_DCN)
1003+
spin_lock_init(&adev->dm.vblank_lock);
1004+
#endif
9601005

9611006
if(amdgpu_dm_irq_init(adev)) {
9621007
DRM_ERROR("amdgpu: failed to initialize DM IRQ support.\n");
@@ -1071,6 +1116,17 @@ static int amdgpu_dm_init(struct amdgpu_device *adev)
10711116

10721117
amdgpu_dm_init_color_mod();
10731118

1119+
#if defined(CONFIG_DRM_AMD_DC_DCN)
1120+
if (adev->dm.dc->caps.max_links > 0) {
1121+
adev->dm.vblank_workqueue = vblank_create_workqueue(adev, adev->dm.dc);
1122+
1123+
if (!adev->dm.vblank_workqueue)
1124+
DRM_ERROR("amdgpu: failed to initialize vblank_workqueue.\n");
1125+
else
1126+
DRM_DEBUG_DRIVER("amdgpu: vblank_workqueue init done %p.\n", adev->dm.vblank_workqueue);
1127+
}
1128+
#endif
1129+
10741130
#ifdef CONFIG_DRM_AMD_DC_HDCP
10751131
if (adev->dm.dc->caps.max_links > 0 && adev->asic_type >= CHIP_RAVEN) {
10761132
adev->dm.hdcp_workqueue = hdcp_create_workqueue(adev, &init_params.cp_psp, adev->dm.dc);
@@ -1936,7 +1992,7 @@ static void dm_gpureset_commit_state(struct dc_state *dc_state,
19361992
dc_commit_updates_for_stream(
19371993
dm->dc, bundle->surface_updates,
19381994
dc_state->stream_status->plane_count,
1939-
dc_state->streams[k], &bundle->stream_update);
1995+
dc_state->streams[k], &bundle->stream_update, dc_state);
19401996
}
19411997

19421998
cleanup:
@@ -1967,7 +2023,8 @@ static void dm_set_dpms_off(struct dc_link *link)
19672023

19682024
stream_update.stream = stream_state;
19692025
dc_commit_updates_for_stream(stream_state->ctx->dc, NULL, 0,
1970-
stream_state, &stream_update);
2026+
stream_state, &stream_update,
2027+
stream_state->ctx->dc->current_state);
19712028
mutex_unlock(&adev->dm.dc_lock);
19722029
}
19732030

@@ -5374,7 +5431,10 @@ static inline int dm_set_vblank(struct drm_crtc *crtc, bool enable)
53745431
struct amdgpu_crtc *acrtc = to_amdgpu_crtc(crtc);
53755432
struct amdgpu_device *adev = drm_to_adev(crtc->dev);
53765433
struct dm_crtc_state *acrtc_state = to_dm_crtc_state(crtc->state);
5434+
#if defined(CONFIG_DRM_AMD_DC_DCN)
53775435
struct amdgpu_display_manager *dm = &adev->dm;
5436+
unsigned long flags;
5437+
#endif
53785438
int rc = 0;
53795439

53805440
if (enable) {
@@ -5397,22 +5457,15 @@ static inline int dm_set_vblank(struct drm_crtc *crtc, bool enable)
53975457
if (amdgpu_in_reset(adev))
53985458
return 0;
53995459

5400-
mutex_lock(&dm->dc_lock);
5401-
5402-
if (enable)
5403-
dm->active_vblank_irq_count++;
5404-
else
5405-
dm->active_vblank_irq_count--;
5406-
54075460
#if defined(CONFIG_DRM_AMD_DC_DCN)
5408-
dc_allow_idle_optimizations(
5409-
adev->dm.dc, dm->active_vblank_irq_count == 0 ? true : false);
5410-
5411-
DRM_DEBUG_DRIVER("Allow idle optimizations (MALL): %d\n", dm->active_vblank_irq_count == 0);
5461+
spin_lock_irqsave(&dm->vblank_lock, flags);
5462+
dm->vblank_workqueue->dm = dm;
5463+
dm->vblank_workqueue->otg_inst = acrtc->otg_inst;
5464+
dm->vblank_workqueue->enable = enable;
5465+
spin_unlock_irqrestore(&dm->vblank_lock, flags);
5466+
schedule_work(&dm->vblank_workqueue->mall_work);
54125467
#endif
54135468

5414-
mutex_unlock(&dm->dc_lock);
5415-
54165469
return 0;
54175470
}
54185471

@@ -7663,7 +7716,7 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state,
76637716
struct drm_crtc *pcrtc,
76647717
bool wait_for_vblank)
76657718
{
7666-
int i;
7719+
uint32_t i;
76677720
uint64_t timestamp_ns;
76687721
struct drm_plane *plane;
76697722
struct drm_plane_state *old_plane_state, *new_plane_state;
@@ -7704,7 +7757,7 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state,
77047757
amdgpu_dm_commit_cursors(state);
77057758

77067759
/* update planes when needed */
7707-
for_each_oldnew_plane_in_state_reverse(state, plane, old_plane_state, new_plane_state, i) {
7760+
for_each_oldnew_plane_in_state(state, plane, old_plane_state, new_plane_state, i) {
77087761
struct drm_crtc *crtc = new_plane_state->crtc;
77097762
struct drm_crtc_state *new_crtc_state;
77107763
struct drm_framebuffer *fb = new_plane_state->fb;
@@ -7927,7 +7980,8 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state,
79277980
bundle->surface_updates,
79287981
planes_count,
79297982
acrtc_state->stream,
7930-
&bundle->stream_update);
7983+
&bundle->stream_update,
7984+
dc_state);
79317985

79327986
/**
79337987
* Enable or disable the interrupts on the backend.
@@ -8263,13 +8317,13 @@ static void amdgpu_dm_atomic_commit_tail(struct drm_atomic_state *state)
82638317
struct dm_connector_state *dm_new_con_state = to_dm_connector_state(new_con_state);
82648318
struct dm_connector_state *dm_old_con_state = to_dm_connector_state(old_con_state);
82658319
struct amdgpu_crtc *acrtc = to_amdgpu_crtc(dm_new_con_state->base.crtc);
8266-
struct dc_surface_update surface_updates[MAX_SURFACES];
8320+
struct dc_surface_update dummy_updates[MAX_SURFACES];
82678321
struct dc_stream_update stream_update;
82688322
struct dc_info_packet hdr_packet;
82698323
struct dc_stream_status *status = NULL;
82708324
bool abm_changed, hdr_changed, scaling_changed;
82718325

8272-
memset(&surface_updates, 0, sizeof(surface_updates));
8326+
memset(&dummy_updates, 0, sizeof(dummy_updates));
82738327
memset(&stream_update, 0, sizeof(stream_update));
82748328

82758329
if (acrtc) {
@@ -8326,15 +8380,16 @@ static void amdgpu_dm_atomic_commit_tail(struct drm_atomic_state *state)
83268380
* To fix this, DC should permit updating only stream properties.
83278381
*/
83288382
for (j = 0; j < status->plane_count; j++)
8329-
surface_updates[j].surface = status->plane_states[j];
8383+
dummy_updates[j].surface = status->plane_states[0];
83308384

83318385

83328386
mutex_lock(&dm->dc_lock);
83338387
dc_commit_updates_for_stream(dm->dc,
8334-
surface_updates,
8388+
dummy_updates,
83358389
status->plane_count,
83368390
dm_new_crtc_state->stream,
8337-
&stream_update);
8391+
&stream_update,
8392+
dc_state);
83388393
mutex_unlock(&dm->dc_lock);
83398394
}
83408395

‎drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h

Lines changed: 27 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -92,6 +92,20 @@ struct dm_compressor_info {
9292
uint64_t gpu_addr;
9393
};
9494

95+
/**
96+
* struct vblank_workqueue - Works to be executed in a separate thread during vblank
97+
* @mall_work: work for mall stutter
98+
* @dm: amdgpu display manager device
99+
* @otg_inst: otg instance of which vblank is being set
100+
* @enable: true if enable vblank
101+
*/
102+
struct vblank_workqueue {
103+
struct work_struct mall_work;
104+
struct amdgpu_display_manager *dm;
105+
int otg_inst;
106+
bool enable;
107+
};
108+
95109
/**
96110
* struct amdgpu_dm_backlight_caps - Information about backlight
97111
*
@@ -243,6 +257,15 @@ struct amdgpu_display_manager {
243257
*/
244258
struct mutex audio_lock;
245259

260+
/**
261+
* @vblank_work_lock:
262+
*
263+
* Guards access to deferred vblank work state.
264+
*/
265+
#if defined(CONFIG_DRM_AMD_DC_DCN)
266+
spinlock_t vblank_lock;
267+
#endif
268+
246269
/**
247270
* @audio_component:
248271
*
@@ -321,6 +344,10 @@ struct amdgpu_display_manager {
321344
struct hdcp_workqueue *hdcp_workqueue;
322345
#endif
323346

347+
#if defined(CONFIG_DRM_AMD_DC_DCN)
348+
struct vblank_workqueue *vblank_workqueue;
349+
#endif
350+
324351
struct drm_atomic_state *cached_state;
325352
struct dc_state *cached_dc_state;
326353

‎drivers/gpu/drm/amd/display/dc/core/dc.c

Lines changed: 8 additions & 19 deletions
Original file line numberDiff line numberDiff line change
@@ -2697,7 +2697,8 @@ void dc_commit_updates_for_stream(struct dc *dc,
26972697
struct dc_surface_update *srf_updates,
26982698
int surface_count,
26992699
struct dc_stream_state *stream,
2700-
struct dc_stream_update *stream_update)
2700+
struct dc_stream_update *stream_update,
2701+
struct dc_state *state)
27012702
{
27022703
const struct dc_stream_status *stream_status;
27032704
enum surface_update_type update_type;
@@ -2716,12 +2717,6 @@ void dc_commit_updates_for_stream(struct dc *dc,
27162717

27172718

27182719
if (update_type >= UPDATE_TYPE_FULL) {
2719-
struct dc_plane_state *new_planes[MAX_SURFACES];
2720-
2721-
memset(new_planes, 0, sizeof(new_planes));
2722-
2723-
for (i = 0; i < surface_count; i++)
2724-
new_planes[i] = srf_updates[i].surface;
27252720

27262721
/* initialize scratch memory for building context */
27272722
context = dc_create_state(dc);
@@ -2730,21 +2725,15 @@ void dc_commit_updates_for_stream(struct dc *dc,
27302725
return;
27312726
}
27322727

2733-
dc_resource_state_copy_construct(
2734-
dc->current_state, context);
2728+
dc_resource_state_copy_construct(state, context);
27352729

2736-
/*remove old surfaces from context */
2737-
if (!dc_rem_all_planes_for_stream(dc, stream, context)) {
2738-
DC_ERROR("Failed to remove streams for new validate context!\n");
2739-
return;
2740-
}
2730+
for (i = 0; i < dc->res_pool->pipe_count; i++) {
2731+
struct pipe_ctx *new_pipe = &context->res_ctx.pipe_ctx[i];
2732+
struct pipe_ctx *old_pipe = &dc->current_state->res_ctx.pipe_ctx[i];
27412733

2742-
/* add surface to context */
2743-
if (!dc_add_all_planes_for_stream(dc, stream, new_planes, surface_count, context)) {
2744-
DC_ERROR("Failed to add streams for new validate context!\n");
2745-
return;
2734+
if (new_pipe->plane_state && new_pipe->plane_state != old_pipe->plane_state)
2735+
new_pipe->plane_state->force_full_update = true;
27462736
}
2747-
27482737
}
27492738

27502739

‎drivers/gpu/drm/amd/display/dc/dc_stream.h

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -294,7 +294,8 @@ void dc_commit_updates_for_stream(struct dc *dc,
294294
struct dc_surface_update *srf_updates,
295295
int surface_count,
296296
struct dc_stream_state *stream,
297-
struct dc_stream_update *stream_update);
297+
struct dc_stream_update *stream_update,
298+
struct dc_state *state);
298299
/*
299300
* Log the current stream state.
300301
*/

‎drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -480,7 +480,6 @@ unsigned int dcn10_get_dig_frontend(struct link_encoder *enc)
480480
break;
481481
default:
482482
// invalid source select DIG
483-
ASSERT(false);
484483
result = ENGINE_ID_UNKNOWN;
485484
}
486485

‎drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -539,6 +539,8 @@ void dcn30_init_hw(struct dc *dc)
539539

540540
fe = dc->links[i]->link_enc->funcs->get_dig_frontend(
541541
dc->links[i]->link_enc);
542+
if (fe == ENGINE_ID_UNKNOWN)
543+
continue;
542544

543545
for (j = 0; j < dc->res_pool->stream_enc_count; j++) {
544546
if (fe == dc->res_pool->stream_enc[j]->id) {

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