drm/msm/disp/dpu1: increase the range of interrupts in dpu_irq_map

Currently, each register in the dpu interrupt set is allowed
to have a maximum of 32 interrupts. With the introduction
of INTF_5_VSYNC and INTF_5_UNDERRUN irqs for EDP panel,
the total number of interrupts under INTR_STATUS register
in dpu_irq_map will exceed 32. Increase the range of each
interrupt register to 64 to handle this.

This patch has dependency on the below series:
https://patchwork.kernel.org/project/linux-arm-msm/list/?series=461193

Signed-off-by: Krishna Manikandan <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Rob Clark <[email protected]>

Author: Krishna Manikandan