drm/msm/dpu: Fix sm8250_mdp register length

robertfoss · robclark · commit b910a0206b59 · 2021-07-27T08:14:55.000-07:00
The downstream dts lists this value as 0x494, and not 0x45c. Fixes: af776a3 ("drm/msm/dpu: add SM8250 to hw catalog") Signed-off-by: Robert Foss <robert.foss@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Link: https://lore.kernel.org/r/20210628085033.9905-1-robert.foss@linaro.org Signed-off-by: Rob Clark <robdclark@chromium.org>
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
@@ -296,7 +296,7 @@ static const struct dpu_mdp_cfg sc7180_mdp[] = {
 static const struct dpu_mdp_cfg sm8250_mdp[] = {
 	{
 	.name = "top_0", .id = MDP_TOP,
-	.base = 0x0, .len = 0x45C,
+	.base = 0x0, .len = 0x494,
 	.features = 0,
 	.highest_bank_bit = 0x3, /* TODO: 2 for LP_DDR4 */
 	.clk_ctrls[DPU_CLK_CTRL_VIG0] = {

Original file line number	Diff line number	Diff line change
`@@ -296,7 +296,7 @@ static const struct dpu_mdp_cfg sc7180_mdp[] = {`
`296`	`296`	`static const struct dpu_mdp_cfg sm8250_mdp[] = {`
`297`	`297`	`{`
`298`	`298`	`.name = "top_0", .id = MDP_TOP,`
`299`		`- .base = 0x0, .len = 0x45C,`
	`299`	`+ .base = 0x0, .len = 0x494,`
`300`	`300`	`.features = 0,`
`301`	`301`	`.highest_bank_bit = 0x3, /* TODO: 2 for LP_DDR4 */`
`302`	`302`	`.clk_ctrls[DPU_CLK_CTRL_VIG0] = {`