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miquelraynalmiquelraynal
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Merge tag 'nand/for-5.15' into mtd/next
NAND core changes: * Repair Miquel Raynal's email address in MAINTAINERS * Fix a couple of spelling mistakes in Kconfig * bbt: Skip bad blocks when searching for the BBT in NAND * Remove never changed ret variable Raw NAND changes: * cafe: Fix a resource leak in the error handling path of 'cafe_nand_probe()' * intel: Fix error handling in probe * omap: Fix kernel doc warning on 'calcuate' typo * gpmc: Fix the ECC bytes vs. OOB bytes equation SPI-NAND core changes: * Properly fill the OOB area. * Fix comment SPI-NAND drivers changes: * macronix: Add Quad support for serial NAND flash
2 parents ee28b42 + 6b430c7 commit c1fe77e

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10 files changed

+73
-27
lines changed

10 files changed

+73
-27
lines changed

‎Documentation/devicetree/bindings/mtd/gpmc-nand.txt

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -122,7 +122,7 @@ on various other factors also like;
122122
so the device should have enough free bytes available its OOB/Spare
123123
area to accommodate ECC for entire page. In general following expression
124124
helps in determining if given device can accommodate ECC syndrome:
125-
"2 + (PAGESIZE / 512) * ECC_BYTES" >= OOBSIZE"
125+
"2 + (PAGESIZE / 512) * ECC_BYTES" <= OOBSIZE"
126126
where
127127
OOBSIZE number of bytes in OOB/spare area
128128
PAGESIZE number of bytes in main-area of device page

‎MAINTAINERS

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1475,15 +1475,15 @@ F: drivers/amba/
14751475
F: include/linux/amba/bus.h
14761476

14771477
ARM PRIMECELL PL35X NAND CONTROLLER DRIVER
1478-
M: Miquel Raynal <[email protected]@bootlin.com>
1478+
M: Miquel Raynal <[email protected]>
14791479
M: Naga Sureshkumar Relli <[email protected]>
14801480
L: [email protected]
14811481
S: Maintained
14821482
F: Documentation/devicetree/bindings/mtd/arm,pl353-nand-r2p1.yaml
14831483
F: drivers/mtd/nand/raw/pl35x-nand-controller.c
14841484

14851485
ARM PRIMECELL PL35X SMC DRIVER
1486-
M: Miquel Raynal <[email protected]@bootlin.com>
1486+
M: Miquel Raynal <[email protected]>
14871487
M: Naga Sureshkumar Relli <[email protected]>
14881488
L: [email protected] (moderated for non-subscribers)
14891489
S: Maintained

‎drivers/mtd/nand/raw/Kconfig

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -480,9 +480,9 @@ config MTD_NAND_RICOH
480480
select MTD_SM_COMMON
481481
help
482482
Enable support for Ricoh R5C852 xD card reader
483-
You also need to enable ether
483+
You also need to enable either
484484
NAND SSFDC (SmartMedia) read only translation layer' or new
485-
expermental, readwrite
485+
experimental, readwrite
486486
'SmartMedia/xD new translation layer'
487487

488488
config MTD_NAND_DISKONCHIP

‎drivers/mtd/nand/raw/cafe_nand.c

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -751,7 +751,7 @@ static int cafe_nand_probe(struct pci_dev *pdev,
751751
"CAFE NAND", mtd);
752752
if (err) {
753753
dev_warn(&pdev->dev, "Could not register IRQ %d\n", pdev->irq);
754-
goto out_ior;
754+
goto out_free_rs;
755755
}
756756

757757
/* Disable master reset, enable NAND clock */
@@ -795,6 +795,8 @@ static int cafe_nand_probe(struct pci_dev *pdev,
795795
/* Disable NAND IRQ in global IRQ mask register */
796796
cafe_writel(cafe, ~1 & cafe_readl(cafe, GLOBAL_IRQ_MASK), GLOBAL_IRQ_MASK);
797797
free_irq(pdev->irq, mtd);
798+
out_free_rs:
799+
free_rs(cafe->rs);
798800
out_ior:
799801
pci_iounmap(pdev, cafe->mmio);
800802
out_free_mtd:

‎drivers/mtd/nand/raw/intel-nand-controller.c

Lines changed: 18 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -631,19 +631,26 @@ static int ebu_nand_probe(struct platform_device *pdev)
631631
ebu_host->clk_rate = clk_get_rate(ebu_host->clk);
632632

633633
ebu_host->dma_tx = dma_request_chan(dev, "tx");
634-
if (IS_ERR(ebu_host->dma_tx))
635-
return dev_err_probe(dev, PTR_ERR(ebu_host->dma_tx),
636-
"failed to request DMA tx chan!.\n");
634+
if (IS_ERR(ebu_host->dma_tx)) {
635+
ret = dev_err_probe(dev, PTR_ERR(ebu_host->dma_tx),
636+
"failed to request DMA tx chan!.\n");
637+
goto err_disable_unprepare_clk;
638+
}
637639

638640
ebu_host->dma_rx = dma_request_chan(dev, "rx");
639-
if (IS_ERR(ebu_host->dma_rx))
640-
return dev_err_probe(dev, PTR_ERR(ebu_host->dma_rx),
641-
"failed to request DMA rx chan!.\n");
641+
if (IS_ERR(ebu_host->dma_rx)) {
642+
ret = dev_err_probe(dev, PTR_ERR(ebu_host->dma_rx),
643+
"failed to request DMA rx chan!.\n");
644+
ebu_host->dma_rx = NULL;
645+
goto err_cleanup_dma;
646+
}
642647

643648
resname = devm_kasprintf(dev, GFP_KERNEL, "addr_sel%d", cs);
644649
res = platform_get_resource_byname(pdev, IORESOURCE_MEM, resname);
645-
if (!res)
646-
return -EINVAL;
650+
if (!res) {
651+
ret = -EINVAL;
652+
goto err_cleanup_dma;
653+
}
647654
ebu_host->cs[cs].addr_sel = res->start;
648655
writel(ebu_host->cs[cs].addr_sel | EBU_ADDR_MASK(5) | EBU_ADDR_SEL_REGEN,
649656
ebu_host->ebu + EBU_ADDR_SEL(cs));
@@ -653,7 +660,8 @@ static int ebu_nand_probe(struct platform_device *pdev)
653660
mtd = nand_to_mtd(&ebu_host->chip);
654661
if (!mtd->name) {
655662
dev_err(ebu_host->dev, "NAND label property is mandatory\n");
656-
return -EINVAL;
663+
ret = -EINVAL;
664+
goto err_cleanup_dma;
657665
}
658666

659667
mtd->dev.parent = dev;
@@ -681,6 +689,7 @@ static int ebu_nand_probe(struct platform_device *pdev)
681689
nand_cleanup(&ebu_host->chip);
682690
err_cleanup_dma:
683691
ebu_dma_cleanup(ebu_host);
692+
err_disable_unprepare_clk:
684693
clk_disable_unprepare(ebu_host->clk);
685694

686695
return ret;

‎drivers/mtd/nand/raw/meson_nand.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -580,7 +580,7 @@ static int meson_nfc_rw_cmd_prepare_and_execute(struct nand_chip *nand,
580580
u32 *addrs = nfc->cmdfifo.rw.addrs;
581581
u32 cs = nfc->param.chip_select;
582582
u32 cmd0, cmd_num, row_start;
583-
int ret = 0, i;
583+
int i;
584584

585585
cmd_num = sizeof(struct nand_rw_cmd) / sizeof(int);
586586

@@ -620,7 +620,7 @@ static int meson_nfc_rw_cmd_prepare_and_execute(struct nand_chip *nand,
620620
meson_nfc_cmd_idle(nfc, nfc->timing.tadl);
621621
}
622622

623-
return ret;
623+
return 0;
624624
}
625625

626626
static int meson_nfc_write_page_sub(struct nand_chip *nand,

‎drivers/mtd/nand/raw/nand_bbt.c

Lines changed: 33 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -447,6 +447,35 @@ static int scan_block_fast(struct nand_chip *this, struct nand_bbt_descr *bd,
447447
return 0;
448448
}
449449

450+
/* Check if a potential BBT block is marked as bad */
451+
static int bbt_block_checkbad(struct nand_chip *this, struct nand_bbt_descr *td,
452+
loff_t offs, uint8_t *buf)
453+
{
454+
struct nand_bbt_descr *bd = this->badblock_pattern;
455+
456+
/*
457+
* No need to check for a bad BBT block if the BBM area overlaps with
458+
* the bad block table marker area in OOB since writing a BBM here
459+
* invalidates the bad block table marker anyway.
460+
*/
461+
if (!(td->options & NAND_BBT_NO_OOB) &&
462+
td->offs >= bd->offs && td->offs < bd->offs + bd->len)
463+
return 0;
464+
465+
/*
466+
* There is no point in checking for a bad block marker if writing
467+
* such marker is not supported
468+
*/
469+
if (this->bbt_options & NAND_BBT_NO_OOB_BBM ||
470+
this->options & NAND_NO_BBM_QUIRK)
471+
return 0;
472+
473+
if (scan_block_fast(this, bd, offs, buf) > 0)
474+
return 1;
475+
476+
return 0;
477+
}
478+
450479
/**
451480
* create_bbt - [GENERIC] Create a bad block table by scanning the device
452481
* @this: NAND chip object
@@ -560,6 +589,10 @@ static int search_bbt(struct nand_chip *this, uint8_t *buf,
560589
int actblock = startblock + dir * block;
561590
loff_t offs = (loff_t)actblock << this->bbt_erase_shift;
562591

592+
/* Check if block is marked bad */
593+
if (bbt_block_checkbad(this, td, offs, buf))
594+
continue;
595+
563596
/* Read first page */
564597
scan_read(this, buf, offs, mtd->writesize, td);
565598
if (!check_pattern(buf, scanlen, mtd->writesize, td)) {

‎drivers/mtd/nand/raw/omap2.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -911,7 +911,7 @@ static int omap_correct_data(struct nand_chip *chip, u_char *dat,
911911
}
912912

913913
/**
914-
* omap_calcuate_ecc - Generate non-inverted ECC bytes.
914+
* omap_calculate_ecc - Generate non-inverted ECC bytes.
915915
* @chip: NAND chip object
916916
* @dat: The pointer to data on which ecc is computed
917917
* @ecc_code: The ecc_code buffer

‎drivers/mtd/nand/spi/core.c

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -288,6 +288,8 @@ static int spinand_ondie_ecc_prepare_io_req(struct nand_device *nand,
288288
struct spinand_device *spinand = nand_to_spinand(nand);
289289
bool enable = (req->mode != MTD_OPS_RAW);
290290

291+
memset(spinand->oobbuf, 0xff, nanddev_per_page_oobsize(nand));
292+
291293
/* Only enable or disable the engine */
292294
return spinand_ecc_enable(spinand, enable);
293295
}
@@ -307,7 +309,7 @@ static int spinand_ondie_ecc_finish_io_req(struct nand_device *nand,
307309
if (req->type == NAND_PAGE_WRITE)
308310
return 0;
309311

310-
/* Finish a page write: check the status, report errors/bitflips */
312+
/* Finish a page read: check the status, report errors/bitflips */
311313
ret = spinand_check_ecc_status(spinand, engine_conf->status);
312314
if (ret == -EBADMSG)
313315
mtd->ecc_stats.failed++;

‎drivers/mtd/nand/spi/macronix.c

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -126,7 +126,7 @@ static const struct spinand_info macronix_spinand_table[] = {
126126
SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
127127
&write_cache_variants,
128128
&update_cache_variants),
129-
0,
129+
SPINAND_HAS_QE_BIT,
130130
SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
131131
mx35lf1ge4ab_ecc_get_status)),
132132
SPINAND_INFO("MX35LF4GE4AD",
@@ -136,7 +136,7 @@ static const struct spinand_info macronix_spinand_table[] = {
136136
SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
137137
&write_cache_variants,
138138
&update_cache_variants),
139-
0,
139+
SPINAND_HAS_QE_BIT,
140140
SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
141141
mx35lf1ge4ab_ecc_get_status)),
142142
SPINAND_INFO("MX35LF1G24AD",
@@ -146,16 +146,16 @@ static const struct spinand_info macronix_spinand_table[] = {
146146
SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
147147
&write_cache_variants,
148148
&update_cache_variants),
149-
0,
149+
SPINAND_HAS_QE_BIT,
150150
SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, NULL)),
151151
SPINAND_INFO("MX35LF2G24AD",
152152
SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x24),
153-
NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1),
153+
NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 2, 1, 1),
154154
NAND_ECCREQ(8, 512),
155155
SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
156156
&write_cache_variants,
157157
&update_cache_variants),
158-
0,
158+
SPINAND_HAS_QE_BIT,
159159
SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, NULL)),
160160
SPINAND_INFO("MX35LF4G24AD",
161161
SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x35),
@@ -164,7 +164,7 @@ static const struct spinand_info macronix_spinand_table[] = {
164164
SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
165165
&write_cache_variants,
166166
&update_cache_variants),
167-
0,
167+
SPINAND_HAS_QE_BIT,
168168
SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, NULL)),
169169
SPINAND_INFO("MX31LF1GE4BC",
170170
SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x1e),
@@ -173,7 +173,7 @@ static const struct spinand_info macronix_spinand_table[] = {
173173
SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
174174
&write_cache_variants,
175175
&update_cache_variants),
176-
0 /*SPINAND_HAS_QE_BIT*/,
176+
SPINAND_HAS_QE_BIT,
177177
SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
178178
mx35lf1ge4ab_ecc_get_status)),
179179
SPINAND_INFO("MX31UF1GE4BC",
@@ -183,7 +183,7 @@ static const struct spinand_info macronix_spinand_table[] = {
183183
SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
184184
&write_cache_variants,
185185
&update_cache_variants),
186-
0 /*SPINAND_HAS_QE_BIT*/,
186+
SPINAND_HAS_QE_BIT,
187187
SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
188188
mx35lf1ge4ab_ecc_get_status)),
189189

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