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weiny2djbw
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cxl/mem: Adjust ram/pmem range to represent DPA ranges
CXL spec defines the volatile DPA range to be 0 to Volatile memory size. It further defines the persistent DPA range to follow directly after the end of the Volatile DPA through the persistent memory size. Essentially Volatile DPA range = [0, Volatile size) Persistent DPA range = [Volatile size, Volatile size + Persistent size) Adjust the pmem_range start to reflect this and remote the TODO. Signed-off-by: Ira Weiny <[email protected]> Reviewed-by: Jonathan Cameron <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Dan Williams <[email protected]>
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drivers/cxl/pci.c

Lines changed: 6 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -1441,8 +1441,9 @@ static int cxl_mem_create_range_info(struct cxl_mem *cxlm)
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if (cxlm->partition_align_bytes == 0) {
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cxlm->ram_range.start = 0;
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cxlm->ram_range.end = cxlm->volatile_only_bytes - 1;
1444-
cxlm->pmem_range.start = 0;
1445-
cxlm->pmem_range.end = cxlm->persistent_only_bytes - 1;
1444+
cxlm->pmem_range.start = cxlm->volatile_only_bytes;
1445+
cxlm->pmem_range.end = cxlm->volatile_only_bytes +
1446+
cxlm->persistent_only_bytes - 1;
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return 0;
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}
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@@ -1466,15 +1467,12 @@ static int cxl_mem_create_range_info(struct cxl_mem *cxlm)
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cxlm->next_volatile_bytes,
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cxlm->next_persistent_bytes);
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1469-
/*
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* TODO: enumerate DPA map, as 'ram' and 'pmem' do not alias.
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* For now, only the capacity is exported in sysfs
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*/
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cxlm->ram_range.start = 0;
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cxlm->ram_range.end = cxlm->active_volatile_bytes - 1;
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1476-
cxlm->pmem_range.start = 0;
1477-
cxlm->pmem_range.end = cxlm->active_persistent_bytes - 1;
1473+
cxlm->pmem_range.start = cxlm->active_volatile_bytes;
1474+
cxlm->pmem_range.end = cxlm->active_volatile_bytes +
1475+
cxlm->active_persistent_bytes - 1;
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return 0;
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}

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