@@ -3442,13 +3442,17 @@ static void glk_pipe_scaler_clock_gating_wa(struct drm_i915_private *dev_priv,
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intel_de_write (dev_priv , CLKGATE_DIS_PSL (pipe ), val );
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}
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- static void icl_pipe_mbus_enable (struct intel_crtc * crtc )
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+ static void icl_pipe_mbus_enable (struct intel_crtc * crtc , bool joined_mbus )
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{
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struct drm_i915_private * dev_priv = to_i915 (crtc -> base .dev );
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enum pipe pipe = crtc -> pipe ;
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u32 val ;
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- val = MBUS_DBOX_A_CREDIT (2 );
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+ /* Wa_22010947358:adl-p */
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+ if (IS_ALDERLAKE_P (dev_priv ))
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+ val = joined_mbus ? MBUS_DBOX_A_CREDIT (6 ) : MBUS_DBOX_A_CREDIT (4 );
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+ else
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+ val = MBUS_DBOX_A_CREDIT (2 );
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if (DISPLAY_VER (dev_priv ) >= 12 ) {
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val |= MBUS_DBOX_BW_CREDIT (2 );
@@ -3604,8 +3608,12 @@ static void hsw_crtc_enable(struct intel_atomic_state *state,
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if (dev_priv -> display .initial_watermarks )
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dev_priv -> display .initial_watermarks (state , crtc );
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- if (DISPLAY_VER (dev_priv ) >= 11 )
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- icl_pipe_mbus_enable (crtc );
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+ if (DISPLAY_VER (dev_priv ) >= 11 ) {
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+ const struct intel_dbuf_state * dbuf_state =
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+ intel_atomic_get_new_dbuf_state (state );
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+
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+ icl_pipe_mbus_enable (crtc , dbuf_state -> joined_mbus );
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+ }
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if (new_crtc_state -> bigjoiner_slave )
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intel_crtc_vblank_on (new_crtc_state );
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