Skip to content

Commit db400ac

Browse files
xdarklightbebarino
authored andcommitted
clk: divider: Switch from .round_rate to .determine_rate by default
.determine_rate is meant to replace .round_rate. The former comes with a benefit which is especially relevant on 32-bit systems: since .determine_rate uses an "unsigned long" (compared to a "signed long" which is used by .round_rate) the maximum value on 32-bit systems increases from 2^31 (or approx. 2.14GHz) to 2^32 (or approx. 4.29GHz). Switch to a .determine_rate implementation by default so 32-bit systems can benefit from the increased maximum value as well as so we have one fewer user of .round_rate. Reviewed-by: Jerome Brunet <[email protected]> Signed-off-by: Martin Blumenstingl <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Stephen Boyd <[email protected]>
1 parent bbd7a6c commit db400ac

File tree

1 file changed

+9
-9
lines changed

1 file changed

+9
-9
lines changed

drivers/clk/clk-divider.c

Lines changed: 9 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -425,8 +425,8 @@ long divider_ro_round_rate_parent(struct clk_hw *hw, struct clk_hw *parent,
425425
}
426426
EXPORT_SYMBOL_GPL(divider_ro_round_rate_parent);
427427

428-
static long clk_divider_round_rate(struct clk_hw *hw, unsigned long rate,
429-
unsigned long *prate)
428+
static int clk_divider_determine_rate(struct clk_hw *hw,
429+
struct clk_rate_request *req)
430430
{
431431
struct clk_divider *divider = to_clk_divider(hw);
432432

@@ -437,13 +437,13 @@ static long clk_divider_round_rate(struct clk_hw *hw, unsigned long rate,
437437
val = clk_div_readl(divider) >> divider->shift;
438438
val &= clk_div_mask(divider->width);
439439

440-
return divider_ro_round_rate(hw, rate, prate, divider->table,
441-
divider->width, divider->flags,
442-
val);
440+
return divider_ro_determine_rate(hw, req, divider->table,
441+
divider->width,
442+
divider->flags, val);
443443
}
444444

445-
return divider_round_rate(hw, rate, prate, divider->table,
446-
divider->width, divider->flags);
445+
return divider_determine_rate(hw, req, divider->table, divider->width,
446+
divider->flags);
447447
}
448448

449449
int divider_get_val(unsigned long rate, unsigned long parent_rate,
@@ -500,14 +500,14 @@ static int clk_divider_set_rate(struct clk_hw *hw, unsigned long rate,
500500

501501
const struct clk_ops clk_divider_ops = {
502502
.recalc_rate = clk_divider_recalc_rate,
503-
.round_rate = clk_divider_round_rate,
503+
.determine_rate = clk_divider_determine_rate,
504504
.set_rate = clk_divider_set_rate,
505505
};
506506
EXPORT_SYMBOL_GPL(clk_divider_ops);
507507

508508
const struct clk_ops clk_divider_ro_ops = {
509509
.recalc_rate = clk_divider_recalc_rate,
510-
.round_rate = clk_divider_round_rate,
510+
.determine_rate = clk_divider_determine_rate,
511511
};
512512
EXPORT_SYMBOL_GPL(clk_divider_ro_ops);
513513

0 commit comments

Comments
 (0)