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Merge branch 'remotes/lorenzo/pci/xilinx-nwl'
- Document optional clock DT property (Michal Simek) - Enable PCIe ref clock (Hyun Kwon) * remotes/lorenzo/pci/xilinx-nwl: PCI: xilinx-nwl: Enable the clock through CCF dt-bindings: pci: xilinx-nwl: Document optional clock property
2 parents 09cfc9d + de0a01f commit eccefc7

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Documentation/devicetree/bindings/pci/xilinx-nwl-pcie.txt

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@@ -35,6 +35,7 @@ Required properties:
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Optional properties:
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- dma-coherent: present if DMA operations are coherent
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- clocks: Input clock specifier. Refer to common clock bindings
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Example:
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drivers/pci/controller/pcie-xilinx-nwl.c

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@@ -6,6 +6,7 @@
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* (C) Copyright 2014 - 2015, Xilinx, Inc.
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*/
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#include <linux/clk.h>
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#include <linux/delay.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
@@ -169,6 +170,7 @@ struct nwl_pcie {
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u8 last_busno;
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struct nwl_msi msi;
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struct irq_domain *legacy_irq_domain;
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struct clk *clk;
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raw_spinlock_t leg_mask_lock;
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};
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@@ -816,6 +818,16 @@ static int nwl_pcie_probe(struct platform_device *pdev)
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return err;
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}
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pcie->clk = devm_clk_get(dev, NULL);
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if (IS_ERR(pcie->clk))
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return PTR_ERR(pcie->clk);
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err = clk_prepare_enable(pcie->clk);
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if (err) {
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dev_err(dev, "can't enable PCIe ref clock\n");
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return err;
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}
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err = nwl_pcie_bridge_init(pcie);
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if (err) {
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dev_err(dev, "HW Initialization failed\n");

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