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lumagrobclark
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drm/msm/dpu: add support for alpha blending properties
Add support for alpha blending properties. Setup the plane blend state according to those properties. Signed-off-by: Dmitry Baryshkov <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Rob Clark <[email protected]>
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2 files changed

+37
-16
lines changed

2 files changed

+37
-16
lines changed

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

Lines changed: 30 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -30,12 +30,6 @@
3030
#include "dpu_core_perf.h"
3131
#include "dpu_trace.h"
3232

33-
#define DPU_DRM_BLEND_OP_NOT_DEFINED 0
34-
#define DPU_DRM_BLEND_OP_OPAQUE 1
35-
#define DPU_DRM_BLEND_OP_PREMULTIPLIED 2
36-
#define DPU_DRM_BLEND_OP_COVERAGE 3
37-
#define DPU_DRM_BLEND_OP_MAX 4
38-
3933
/* layer mixer index on dpu_crtc */
4034
#define LEFT_MIXER 0
4135
#define RIGHT_MIXER 1
@@ -146,20 +140,43 @@ static void _dpu_crtc_setup_blend_cfg(struct dpu_crtc_mixer *mixer,
146140
{
147141
struct dpu_hw_mixer *lm = mixer->hw_lm;
148142
uint32_t blend_op;
143+
uint32_t fg_alpha, bg_alpha;
149144

150-
/* default to opaque blending */
151-
blend_op = DPU_BLEND_FG_ALPHA_FG_CONST |
152-
DPU_BLEND_BG_ALPHA_BG_CONST;
145+
fg_alpha = pstate->base.alpha >> 8;
146+
bg_alpha = 0xff - fg_alpha;
153147

154-
if (format->alpha_enable) {
148+
/* default to opaque blending */
149+
if (pstate->base.pixel_blend_mode == DRM_MODE_BLEND_PIXEL_NONE ||
150+
!format->alpha_enable) {
151+
blend_op = DPU_BLEND_FG_ALPHA_FG_CONST |
152+
DPU_BLEND_BG_ALPHA_BG_CONST;
153+
} else if (pstate->base.pixel_blend_mode == DRM_MODE_BLEND_PREMULTI) {
154+
blend_op = DPU_BLEND_FG_ALPHA_FG_CONST |
155+
DPU_BLEND_BG_ALPHA_FG_PIXEL;
156+
if (fg_alpha != 0xff) {
157+
bg_alpha = fg_alpha;
158+
blend_op |= DPU_BLEND_BG_MOD_ALPHA |
159+
DPU_BLEND_BG_INV_MOD_ALPHA;
160+
} else {
161+
blend_op |= DPU_BLEND_BG_INV_ALPHA;
162+
}
163+
} else {
155164
/* coverage blending */
156165
blend_op = DPU_BLEND_FG_ALPHA_FG_PIXEL |
157-
DPU_BLEND_BG_ALPHA_FG_PIXEL |
158-
DPU_BLEND_BG_INV_ALPHA;
166+
DPU_BLEND_BG_ALPHA_FG_PIXEL;
167+
if (fg_alpha != 0xff) {
168+
bg_alpha = fg_alpha;
169+
blend_op |= DPU_BLEND_FG_MOD_ALPHA |
170+
DPU_BLEND_FG_INV_MOD_ALPHA |
171+
DPU_BLEND_BG_MOD_ALPHA |
172+
DPU_BLEND_BG_INV_MOD_ALPHA;
173+
} else {
174+
blend_op |= DPU_BLEND_BG_INV_ALPHA;
175+
}
159176
}
160177

161178
lm->ops.setup_blend_config(lm, pstate->stage,
162-
0xFF, 0, blend_op);
179+
fg_alpha, bg_alpha, blend_op);
163180

164181
DRM_DEBUG_ATOMIC("format:%p4cc, alpha_en:%u blend_op:0x%x\n",
165182
&format->base.pixel_format, format->alpha_enable, blend_op);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

Lines changed: 7 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1339,9 +1339,7 @@ static void dpu_plane_reset(struct drm_plane *plane)
13391339
return;
13401340
}
13411341

1342-
pstate->base.plane = plane;
1343-
1344-
plane->state = &pstate->base;
1342+
__drm_atomic_helper_plane_reset(plane, &pstate->base);
13451343
}
13461344

13471345
#ifdef CONFIG_DEBUG_FS
@@ -1647,6 +1645,12 @@ struct drm_plane *dpu_plane_init(struct drm_device *dev,
16471645
if (ret)
16481646
DPU_ERROR("failed to install zpos property, rc = %d\n", ret);
16491647

1648+
drm_plane_create_alpha_property(plane);
1649+
drm_plane_create_blend_mode_property(plane,
1650+
BIT(DRM_MODE_BLEND_PIXEL_NONE) |
1651+
BIT(DRM_MODE_BLEND_PREMULTI) |
1652+
BIT(DRM_MODE_BLEND_COVERAGE));
1653+
16501654
drm_plane_create_rotation_property(plane,
16511655
DRM_MODE_ROTATE_0,
16521656
DRM_MODE_ROTATE_0 |

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