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Merge tag 'mediatek-drm-next-5.15' of https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux into drm-next
Mediatek DRM Next for Linux 5.15 1. MT8133 AAL support, adjust rdma fifo threshold formula. 2. Implement mmap as GEM object function. 3. Add support for MT8167. 4. Test component initialization earlier in the function mtk_drm_crtc_create. 5. CMDQ refinement. Signed-off-by: Dave Airlie <[email protected]> From: Chun-Kuang Hu <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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‎Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt

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@@ -7,7 +7,7 @@ channel output.
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Required properties:
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- compatible: "mediatek,<chip>-dsi"
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- the supported chips are mt2701, mt7623, mt8173 and mt8183.
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- the supported chips are mt2701, mt7623, mt8167, mt8173 and mt8183.
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- reg: Physical base address and length of the controller's registers
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- interrupts: The interrupt signal from the function block.
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- clocks: device clocks

‎drivers/gpu/drm/mediatek/Makefile

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@@ -1,6 +1,7 @@
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# SPDX-License-Identifier: GPL-2.0
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3-
mediatek-drm-y := mtk_disp_ccorr.o \
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mediatek-drm-y := mtk_disp_aal.o \
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mtk_disp_ccorr.o \
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mtk_disp_color.o \
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mtk_disp_gamma.o \
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mtk_disp_ovl.o \

‎drivers/gpu/drm/mediatek/mtk_disp_aal.c

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@@ -0,0 +1,167 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2021 MediaTek Inc.
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*/
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#include <linux/clk.h>
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#include <linux/component.h>
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#include <linux/module.h>
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#include <linux/of_device.h>
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#include <linux/of_irq.h>
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#include <linux/platform_device.h>
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#include <linux/soc/mediatek/mtk-cmdq.h>
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#include "mtk_disp_drv.h"
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#include "mtk_drm_crtc.h"
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#include "mtk_drm_ddp_comp.h"
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#define DISP_AAL_EN 0x0000
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#define AAL_EN BIT(0)
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#define DISP_AAL_SIZE 0x0030
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struct mtk_disp_aal_data {
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bool has_gamma;
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};
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/**
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* struct mtk_disp_aal - DISP_AAL driver structure
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* @ddp_comp - structure containing type enum and hardware resources
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* @crtc - associated crtc to report irq events to
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*/
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struct mtk_disp_aal {
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struct clk *clk;
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void __iomem *regs;
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struct cmdq_client_reg cmdq_reg;
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const struct mtk_disp_aal_data *data;
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};
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int mtk_aal_clk_enable(struct device *dev)
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{
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struct mtk_disp_aal *aal = dev_get_drvdata(dev);
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return clk_prepare_enable(aal->clk);
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}
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void mtk_aal_clk_disable(struct device *dev)
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{
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struct mtk_disp_aal *aal = dev_get_drvdata(dev);
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clk_disable_unprepare(aal->clk);
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}
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void mtk_aal_config(struct device *dev, unsigned int w,
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unsigned int h, unsigned int vrefresh,
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unsigned int bpc, struct cmdq_pkt *cmdq_pkt)
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{
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struct mtk_disp_aal *aal = dev_get_drvdata(dev);
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mtk_ddp_write(cmdq_pkt, w << 16 | h, &aal->cmdq_reg, aal->regs, DISP_AAL_SIZE);
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}
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void mtk_aal_gamma_set(struct device *dev, struct drm_crtc_state *state)
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{
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struct mtk_disp_aal *aal = dev_get_drvdata(dev);
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if (aal->data && aal->data->has_gamma)
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mtk_gamma_set_common(aal->regs, state);
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}
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void mtk_aal_start(struct device *dev)
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{
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struct mtk_disp_aal *aal = dev_get_drvdata(dev);
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writel(AAL_EN, aal->regs + DISP_AAL_EN);
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}
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void mtk_aal_stop(struct device *dev)
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{
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struct mtk_disp_aal *aal = dev_get_drvdata(dev);
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writel_relaxed(0x0, aal->regs + DISP_AAL_EN);
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}
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static int mtk_disp_aal_bind(struct device *dev, struct device *master,
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void *data)
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{
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return 0;
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}
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static void mtk_disp_aal_unbind(struct device *dev, struct device *master,
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void *data)
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{
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}
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static const struct component_ops mtk_disp_aal_component_ops = {
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.bind = mtk_disp_aal_bind,
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.unbind = mtk_disp_aal_unbind,
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};
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static int mtk_disp_aal_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct mtk_disp_aal *priv;
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struct resource *res;
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int ret;
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priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
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if (!priv)
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return -ENOMEM;
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priv->clk = devm_clk_get(dev, NULL);
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if (IS_ERR(priv->clk)) {
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dev_err(dev, "failed to get aal clk\n");
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return PTR_ERR(priv->clk);
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}
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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priv->regs = devm_ioremap_resource(dev, res);
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if (IS_ERR(priv->regs)) {
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dev_err(dev, "failed to ioremap aal\n");
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return PTR_ERR(priv->regs);
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}
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#if IS_REACHABLE(CONFIG_MTK_CMDQ)
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ret = cmdq_dev_get_client_reg(dev, &priv->cmdq_reg, 0);
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if (ret)
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dev_dbg(dev, "get mediatek,gce-client-reg fail!\n");
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#endif
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priv->data = of_device_get_match_data(dev);
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platform_set_drvdata(pdev, priv);
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ret = component_add(dev, &mtk_disp_aal_component_ops);
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if (ret)
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dev_err(dev, "Failed to add component: %d\n", ret);
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return ret;
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}
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static int mtk_disp_aal_remove(struct platform_device *pdev)
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{
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component_del(&pdev->dev, &mtk_disp_aal_component_ops);
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return 0;
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}
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static const struct mtk_disp_aal_data mt8173_aal_driver_data = {
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.has_gamma = true,
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};
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static const struct of_device_id mtk_disp_aal_driver_dt_match[] = {
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{ .compatible = "mediatek,mt8173-disp-aal",
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.data = &mt8173_aal_driver_data},
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{ .compatible = "mediatek,mt8183-disp-aal"},
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{},
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};
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MODULE_DEVICE_TABLE(of, mtk_disp_aal_driver_dt_match);
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struct platform_driver mtk_disp_aal_driver = {
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.probe = mtk_disp_aal_probe,
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.remove = mtk_disp_aal_remove,
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.driver = {
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.name = "mediatek-disp-aal",
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.owner = THIS_MODULE,
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.of_match_table = mtk_disp_aal_driver_dt_match,
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},
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};

‎drivers/gpu/drm/mediatek/mtk_disp_drv.h

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Original file line numberDiff line numberDiff line change
@@ -9,6 +9,15 @@
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#include <linux/soc/mediatek/mtk-cmdq.h>
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#include "mtk_drm_plane.h"
1111

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int mtk_aal_clk_enable(struct device *dev);
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void mtk_aal_clk_disable(struct device *dev);
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void mtk_aal_config(struct device *dev, unsigned int w,
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unsigned int h, unsigned int vrefresh,
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unsigned int bpc, struct cmdq_pkt *cmdq_pkt);
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void mtk_aal_gamma_set(struct device *dev, struct drm_crtc_state *state);
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void mtk_aal_start(struct device *dev);
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void mtk_aal_stop(struct device *dev);
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void mtk_ccorr_ctm_set(struct device *dev, struct drm_crtc_state *state);
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int mtk_ccorr_clk_enable(struct device *dev);
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void mtk_ccorr_clk_disable(struct device *dev);

‎drivers/gpu/drm/mediatek/mtk_disp_rdma.c

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@@ -162,10 +162,10 @@ void mtk_rdma_config(struct device *dev, unsigned int width,
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/*
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* Enable FIFO underflow since DSI and DPI can't be blocked.
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* Keep the FIFO pseudo size reset default of 8 KiB. Set the
165-
* output threshold to 6 microseconds with 7/6 overhead to
166-
* account for blanking, and with a pixel depth of 4 bytes:
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* output threshold to 70% of max fifo size to make sure the
166+
* threhold will not overflow
167167
*/
168-
threshold = width * height * vrefresh * 4 * 7 / 1000000;
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threshold = rdma_fifo_size * 7 / 10;
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reg = RDMA_FIFO_UNDERFLOW_EN |
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RDMA_FIFO_PSEUDO_SIZE(rdma_fifo_size) |
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RDMA_OUTPUT_VALID_FIFO_THRESHOLD(threshold);

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