@@ -56,6 +56,8 @@ class CIRGenItaniumCXXABI : public CIRGenCXXABI {
5656 bool delegating, Address thisAddr,
5757 QualType thisTy) override ;
5858
59+ void emitRethrow (CIRGenFunction &cgf, bool isNoReturn) override ;
60+
5961 bool useThunkForDtorVariant (const CXXDestructorDecl *dtor,
6062 CXXDtorType dt) const override {
6163 // Itanium does not emit any destructor variant as an inline thunk.
@@ -352,6 +354,44 @@ void CIRGenItaniumCXXABI::emitDestructorCall(
352354 vttTy, nullptr );
353355}
354356
357+ // The idea here is creating a separate block for the throw with an
358+ // `UnreachableOp` as the terminator. So, we branch from the current block
359+ // to the throw block and create a block for the remaining operations.
360+ static void insertThrowAndSplit (mlir::OpBuilder &builder, mlir::Location loc,
361+ mlir::Value exceptionPtr = {},
362+ mlir::FlatSymbolRefAttr typeInfo = {},
363+ mlir::FlatSymbolRefAttr dtor = {}) {
364+ mlir::Block *currentBlock = builder.getInsertionBlock ();
365+ mlir::Region *region = currentBlock->getParent ();
366+
367+ if (currentBlock->empty ()) {
368+ cir::ThrowOp::create (builder, loc, exceptionPtr, typeInfo, dtor);
369+ cir::UnreachableOp::create (builder, loc);
370+ } else {
371+ mlir::Block *throwBlock = builder.createBlock (region);
372+
373+ cir::ThrowOp::create (builder, loc, exceptionPtr, typeInfo, dtor);
374+ cir::UnreachableOp::create (builder, loc);
375+
376+ builder.setInsertionPointToEnd (currentBlock);
377+ cir::BrOp::create (builder, loc, throwBlock);
378+ }
379+
380+ (void )builder.createBlock (region);
381+ }
382+
383+ void CIRGenItaniumCXXABI::emitRethrow (CIRGenFunction &cgf, bool isNoReturn) {
384+ // void __cxa_rethrow();
385+ if (isNoReturn) {
386+ CIRGenBuilderTy &builder = cgf.getBuilder ();
387+ assert (cgf.currSrcLoc && " expected source location" );
388+ mlir::Location loc = *cgf.currSrcLoc ;
389+ insertThrowAndSplit (builder, loc);
390+ } else {
391+ cgm.errorNYI (" emitRethrow with isNoReturn false" );
392+ }
393+ }
394+
355395CIRGenCXXABI *clang::CIRGen::CreateCIRGenItaniumCXXABI (CIRGenModule &cgm) {
356396 switch (cgm.getASTContext ().getCXXABIKind ()) {
357397 case TargetCXXABI::GenericItanium:
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