@@ -212,11 +212,9 @@ class SIWholeQuadMode : public MachineFunctionPass {
212212 MachineBasicBlock::iterator Before, Register SavedOrig,
213213 char NonStrictState, char CurrentStrictState);
214214
215- MachineBasicBlock *splitBlock (MachineBasicBlock *BB, MachineInstr *TermMI);
216-
217- MachineInstr *lowerKillI1 (MachineBasicBlock &MBB, MachineInstr &MI,
218- bool IsWQM);
219- MachineInstr *lowerKillF32 (MachineBasicBlock &MBB, MachineInstr &MI);
215+ void splitBlock (MachineInstr *TermMI);
216+ MachineInstr *lowerKillI1 (MachineInstr &MI, bool IsWQM);
217+ MachineInstr *lowerKillF32 (MachineInstr &MI);
220218
221219 void lowerBlock (MachineBasicBlock &MBB, BlockInfo &BI);
222220 void processBlock (MachineBasicBlock &MBB, BlockInfo &BI, bool IsEntry);
@@ -746,8 +744,8 @@ SIWholeQuadMode::saveSCC(MachineBasicBlock &MBB,
746744 return Restore;
747745}
748746
749- MachineBasicBlock * SIWholeQuadMode::splitBlock (MachineBasicBlock *BB,
750- MachineInstr * TermMI) {
747+ void SIWholeQuadMode::splitBlock (MachineInstr *TermMI) {
748+ MachineBasicBlock *BB = TermMI-> getParent ();
751749 LLVM_DEBUG (dbgs () << " Split block " << printMBBReference (*BB) << " @ "
752750 << *TermMI << " \n " );
753751
@@ -796,12 +794,9 @@ MachineBasicBlock *SIWholeQuadMode::splitBlock(MachineBasicBlock *BB,
796794 .addMBB (SplitBB);
797795 LIS->InsertMachineInstrInMaps (*MI);
798796 }
799-
800- return SplitBB;
801797}
802798
803- MachineInstr *SIWholeQuadMode::lowerKillF32 (MachineBasicBlock &MBB,
804- MachineInstr &MI) {
799+ MachineInstr *SIWholeQuadMode::lowerKillF32 (MachineInstr &MI) {
805800 assert (LiveMaskReg.isVirtual ());
806801
807802 const DebugLoc &DL = MI.getDebugLoc ();
@@ -869,6 +864,8 @@ MachineInstr *SIWholeQuadMode::lowerKillF32(MachineBasicBlock &MBB,
869864 llvm_unreachable (" invalid ISD:SET cond code" );
870865 }
871866
867+ MachineBasicBlock &MBB = *MI.getParent ();
868+
872869 // Pick opcode based on comparison type.
873870 MachineInstr *VcmpMI;
874871 const MachineOperand &Op0 = MI.getOperand (0 );
@@ -919,10 +916,11 @@ MachineInstr *SIWholeQuadMode::lowerKillF32(MachineBasicBlock &MBB,
919916 return NewTerm;
920917}
921918
922- MachineInstr *SIWholeQuadMode::lowerKillI1 (MachineBasicBlock &MBB,
923- MachineInstr &MI, bool IsWQM) {
919+ MachineInstr *SIWholeQuadMode::lowerKillI1 (MachineInstr &MI, bool IsWQM) {
924920 assert (LiveMaskReg.isVirtual ());
925921
922+ MachineBasicBlock &MBB = *MI.getParent ();
923+
926924 const DebugLoc &DL = MI.getDebugLoc ();
927925 MachineInstr *MaskUpdateMI = nullptr ;
928926
@@ -1055,10 +1053,10 @@ void SIWholeQuadMode::lowerBlock(MachineBasicBlock &MBB, BlockInfo &BI) {
10551053 switch (MI.getOpcode ()) {
10561054 case AMDGPU::SI_DEMOTE_I1:
10571055 case AMDGPU::SI_KILL_I1_TERMINATOR:
1058- SplitPoint = lowerKillI1 (MBB, MI, State == StateWQM);
1056+ SplitPoint = lowerKillI1 (MI, State == StateWQM);
10591057 break ;
10601058 case AMDGPU::SI_KILL_F32_COND_IMM_TERMINATOR:
1061- SplitPoint = lowerKillF32 (MBB, MI);
1059+ SplitPoint = lowerKillF32 (MI);
10621060 break ;
10631061 case AMDGPU::ENTER_STRICT_WWM:
10641062 ActiveLanesReg = MI.getOperand (0 ).getReg ();
@@ -1084,12 +1082,8 @@ void SIWholeQuadMode::lowerBlock(MachineBasicBlock &MBB, BlockInfo &BI) {
10841082 }
10851083
10861084 // Perform splitting after instruction scan to simplify iteration.
1087- if (!SplitPoints.empty ()) {
1088- MachineBasicBlock *BB = &MBB;
1089- for (MachineInstr *MI : SplitPoints) {
1090- BB = splitBlock (BB, MI);
1091- }
1092- }
1085+ for (MachineInstr *MI : SplitPoints)
1086+ splitBlock (MI);
10931087}
10941088
10951089// Return an iterator in the (inclusive) range [First, Last] at which
@@ -1546,19 +1540,18 @@ bool SIWholeQuadMode::lowerCopyInstrs() {
15461540
15471541bool SIWholeQuadMode::lowerKillInstrs (bool IsWQM) {
15481542 for (MachineInstr *MI : KillInstrs) {
1549- MachineBasicBlock *MBB = MI->getParent ();
15501543 MachineInstr *SplitPoint = nullptr ;
15511544 switch (MI->getOpcode ()) {
15521545 case AMDGPU::SI_DEMOTE_I1:
15531546 case AMDGPU::SI_KILL_I1_TERMINATOR:
1554- SplitPoint = lowerKillI1 (*MBB, * MI, IsWQM);
1547+ SplitPoint = lowerKillI1 (*MI, IsWQM);
15551548 break ;
15561549 case AMDGPU::SI_KILL_F32_COND_IMM_TERMINATOR:
1557- SplitPoint = lowerKillF32 (*MBB, * MI);
1550+ SplitPoint = lowerKillF32 (*MI);
15581551 break ;
15591552 }
15601553 if (SplitPoint)
1561- splitBlock (MBB, SplitPoint);
1554+ splitBlock (SplitPoint);
15621555 }
15631556 return !KillInstrs.empty ();
15641557}
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