[AArch64] Neoverse V2 FeatureDisableLatencySchedHeuristic (llvm#140897)

This adds FeatureDisableLatencySchedHeuristic to the Neoverse V2 core
tuning description. This gives us a 20% improvement on a key workload,
some other minor improvements here and there, and no real regressions;
nothing outside the noise levels.

Earlier attempts to solve this problems included disabling the MI
scheduler entirely (llvm#127784), and llvm#139557 was about a heuristic to not
schedule hand-written vector code. This solution is preferred because it
avoids another heuristic and achieves what we want, and for what is
worth, there is a lot of precedent for setting this feature.

Thanks to:
- Ricardo Jesus for pointing out this subtarget feature, and
- Cameron McInally for the extensive performance testing.

Author: sjoerdmeijer

llvm/lib/Target/AArch64/AArch64Processors.td

@@ -561,7 +561,8 @@ def TuneNeoverseV2 : SubtargetFeature<"neoversev2", "ARMProcFamily", "NeoverseV2
                                       FeatureEnableSelectOptimize,
                                       FeatureUseFixedOverScalableIfEqualCost,
                                       FeatureAvoidLDAPUR,
-                                      FeaturePredictableSelectIsExpensive]>;
+                                      FeaturePredictableSelectIsExpensive,
+                                      FeatureDisableLatencySchedHeuristic]>;
 
 def TuneNeoverseV3 : SubtargetFeature<"neoversev3", "ARMProcFamily", "NeoverseV3",
                                       "Neoverse V3 ARM processors", [