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[GlobalISel] Add Saturated Truncate Instructions (llvm#147526)
Introduces saturated truncate instructions to Global ISel: G_TRUNC_SSAT_S, G_TRUNC_SSAT_U, G_TRUNC_USAT_U. These were previously introduced to SDAG to reduce redundant code. The patch only initially introduces the instruction, a later patch will follow to add combines and legalization for each instruction.
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10 files changed

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‎llvm/docs/GlobalISel/GenericOpcode.rst‎

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@@ -148,6 +148,33 @@ G_EXTRACT for scalar types, but acts elementwise on vectors.
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%1:_(s16) = G_TRUNC %0:_(s32)
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G_TRUNC_SSAT_S
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^^^^^^^^^^^^^^
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Truncate a signed input to a signed result with saturation.
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.. code-block:: none
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%1:_(s16) = G_TRUNC_SSAT_S %0:_(s32)
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G_TRUNC_SSAT_U
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^^^^^^^^^^^^^^
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Truncate a signed input to an unsigned result with saturation.
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.. code-block:: none
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%1:_(s16) = G_TRUNC_SSAT_U %0:_(s32)
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G_TRUNC_USAT_U
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^^^^^^^^^^^^^^
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Truncate a unsigned input to an unsigned result with saturation.
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.. code-block:: none
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%1:_(s16) = G_TRUNC_USAT_U %0:_(s32)
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Type Conversions
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----------------
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‎llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h‎

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@@ -763,7 +763,7 @@ class LLVM_ABI MachineIRBuilder {
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/// Build and insert \p Res = G_SEXT \p Op, \p Res = G_TRUNC \p Op, or
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/// \p Res = COPY \p Op depending on the differing sizes of \p Res and \p Op.
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/// ///
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///
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/// \pre setBasicBlock or setMI must have been called.
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/// \pre \p Res must be a generic virtual register with scalar or vector type.
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/// \pre \p Op must be a generic virtual register with scalar or vector type.
@@ -773,7 +773,7 @@ class LLVM_ABI MachineIRBuilder {
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/// Build and insert \p Res = G_ZEXT \p Op, \p Res = G_TRUNC \p Op, or
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/// \p Res = COPY \p Op depending on the differing sizes of \p Res and \p Op.
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/// ///
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///
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/// \pre setBasicBlock or setMI must have been called.
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/// \pre \p Res must be a generic virtual register with scalar or vector type.
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/// \pre \p Op must be a generic virtual register with scalar or vector type.
@@ -783,7 +783,7 @@ class LLVM_ABI MachineIRBuilder {
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// Build and insert \p Res = G_ANYEXT \p Op, \p Res = G_TRUNC \p Op, or
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/// \p Res = COPY \p Op depending on the differing sizes of \p Res and \p Op.
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/// ///
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///
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/// \pre setBasicBlock or setMI must have been called.
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/// \pre \p Res must be a generic virtual register with scalar or vector type.
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/// \pre \p Op must be a generic virtual register with scalar or vector type.
@@ -794,7 +794,7 @@ class LLVM_ABI MachineIRBuilder {
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/// Build and insert \p Res = \p ExtOpc, \p Res = G_TRUNC \p
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/// Op, or \p Res = COPY \p Op depending on the differing sizes of \p Res and
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/// \p Op.
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/// ///
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///
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/// \pre setBasicBlock or setMI must have been called.
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/// \pre \p Res must be a generic virtual register with scalar or vector type.
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/// \pre \p Op must be a generic virtual register with scalar or vector type.
@@ -809,6 +809,48 @@ class LLVM_ABI MachineIRBuilder {
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MachineInstrBuilder buildZExtInReg(const DstOp &Res, const SrcOp &Op,
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int64_t ImmOp);
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/// Build and insert \p Res = \p G_TRUNC_SSAT_S \p Op
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///
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/// G_TRUNC_SSAT_S truncates the signed input, \p Op, to a signed result with
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/// saturation.
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///
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/// \pre setBasicBlock or setMI must have been called.
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/// \pre \p Res must be a generic virtual register with scalar or vector type.
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/// \pre \p Op must be a generic virtual register with scalar or vector type.
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///
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/// \return The newly created instruction.
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MachineInstrBuilder buildTruncSSatS(const DstOp &Res, const SrcOp &Op) {
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return buildInstr(TargetOpcode::G_TRUNC_SSAT_S, {Res}, {Op});
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}
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/// Build and insert \p Res = \p G_TRUNC_SSAT_U \p Op
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///
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/// G_TRUNC_SSAT_U truncates the signed input, \p Op, to an unsigned result
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/// with saturation.
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///
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/// \pre setBasicBlock or setMI must have been called.
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/// \pre \p Res must be a generic virtual register with scalar or vector type.
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/// \pre \p Op must be a generic virtual register with scalar or vector type.
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///
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/// \return The newly created instruction.
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MachineInstrBuilder buildTruncSSatU(const DstOp &Res, const SrcOp &Op) {
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return buildInstr(TargetOpcode::G_TRUNC_SSAT_U, {Res}, {Op});
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}
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/// Build and insert \p Res = \p G_TRUNC_USAT_U \p Op
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///
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/// G_TRUNC_USAT_U truncates the unsigned input, \p Op, to an unsigned result
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/// with saturation.
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///
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/// \pre setBasicBlock or setMI must have been called.
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/// \pre \p Res must be a generic virtual register with scalar or vector type.
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/// \pre \p Op must be a generic virtual register with scalar or vector type.
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///
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/// \return The newly created instruction.
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MachineInstrBuilder buildTruncUSatU(const DstOp &Res, const SrcOp &Op) {
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return buildInstr(TargetOpcode::G_TRUNC_USAT_U, {Res}, {Op});
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}
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/// Build and insert an appropriate cast between two registers of equal size.
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MachineInstrBuilder buildCast(const DstOp &Dst, const SrcOp &Src);
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‎llvm/include/llvm/Support/TargetOpcodes.def‎

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@@ -475,6 +475,15 @@ HANDLE_TARGET_OPCODE(G_ANYEXT)
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/// elements of the vector.
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HANDLE_TARGET_OPCODE(G_TRUNC)
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/// Generic instruction to truncate a signed operand to a signed result with saturation.
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HANDLE_TARGET_OPCODE(G_TRUNC_SSAT_S)
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/// Generic instruction to truncate a signed operand to an unsigned result with saturation.
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HANDLE_TARGET_OPCODE(G_TRUNC_SSAT_U)
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/// Generic instruction to truncate a unsigned operand to an unsigned result with saturation.
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HANDLE_TARGET_OPCODE(G_TRUNC_USAT_U)
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/// Generic integer constant.
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HANDLE_TARGET_OPCODE(G_CONSTANT)
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‎llvm/include/llvm/Target/GenericOpcodes.td‎

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@@ -86,6 +86,27 @@ def G_TRUNC : GenericInstruction {
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let hasSideEffects = false;
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}
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// Truncate the signed operand to a signed result with saturation.
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def G_TRUNC_SSAT_S : GenericInstruction {
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let OutOperandList = (outs type0:$dst);
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let InOperandList = (ins type1:$src);
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let hasSideEffects = false;
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}
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// Truncate the signed operand to an unsigned result with saturation.
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def G_TRUNC_SSAT_U : GenericInstruction {
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let OutOperandList = (outs type0:$dst);
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let InOperandList = (ins type1:$src);
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let hasSideEffects = false;
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}
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// Truncate the unsigned operand to an unsigned result with saturation.
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def G_TRUNC_USAT_U : GenericInstruction {
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let OutOperandList = (outs type0:$dst);
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let InOperandList = (ins type1:$src);
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let hasSideEffects = false;
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}
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def G_IMPLICIT_DEF : GenericInstruction {
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let OutOperandList = (outs type0:$dst);
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let InOperandList = (ins);

‎llvm/lib/CodeGen/MachineVerifier.cpp‎

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@@ -1424,6 +1424,9 @@ void MachineVerifier::verifyPreISelGenericInstruction(const MachineInstr *MI) {
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case TargetOpcode::G_ZEXT:
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case TargetOpcode::G_ANYEXT:
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case TargetOpcode::G_TRUNC:
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case TargetOpcode::G_TRUNC_SSAT_S:
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case TargetOpcode::G_TRUNC_SSAT_U:
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case TargetOpcode::G_TRUNC_USAT_U:
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case TargetOpcode::G_FPEXT:
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case TargetOpcode::G_FPTRUNC: {
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// Number of operands and presense of types is already checked (and
@@ -1450,6 +1453,9 @@ void MachineVerifier::verifyPreISelGenericInstruction(const MachineInstr *MI) {
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report("Generic extend has destination type no larger than source", MI);
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break;
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case TargetOpcode::G_TRUNC:
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case TargetOpcode::G_TRUNC_SSAT_S:
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case TargetOpcode::G_TRUNC_SSAT_U:
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case TargetOpcode::G_TRUNC_USAT_U:
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case TargetOpcode::G_FPTRUNC:
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if (DstSize >= SrcSize)
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report("Generic truncate has destination type no smaller than source",

‎llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir‎

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@@ -319,6 +319,15 @@
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# DEBUG-NEXT: G_TRUNC (opcode {{[0-9]+}}): 2 type indices, 0 imm indices
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# DEBUG-NEXT: .. type index coverage check SKIPPED: user-defined predicate detected
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# DEBUG-NEXT: .. imm index coverage check SKIPPED: user-defined predicate detected
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# DEBUG-NEXT: G_TRUNC_SSAT_S (opcode {{[0-9]+}}): 2 type indices, 0 imm indices
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# DEBUG-NEXT: .. type index coverage check SKIPPED: no rules defined
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# DEBUG-NEXT: .. imm index coverage check SKIPPED: no rules defined
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# DEBUG-NEXT: G_TRUNC_SSAT_U (opcode {{[0-9]+}}): 2 type indices, 0 imm indices
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# DEBUG-NEXT: .. type index coverage check SKIPPED: no rules defined
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# DEBUG-NEXT: .. imm index coverage check SKIPPED: no rules defined
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# DEBUG-NEXT: G_TRUNC_USAT_U (opcode {{[0-9]+}}): 2 type indices, 0 imm indices
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# DEBUG-NEXT: .. type index coverage check SKIPPED: no rules defined
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# DEBUG-NEXT: .. imm index coverage check SKIPPED: no rules defined
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# DEBUG-NEXT: G_CONSTANT (opcode {{[0-9]+}}): 1 type index, 0 imm indices
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# DEBUG-NEXT: .. the first uncovered type index: 1, OK
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# DEBUG-NEXT: .. the first uncovered imm index: 0, OK

‎llvm/test/CodeGen/RISCV/GlobalISel/legalizer-info-validation.mir‎

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@@ -315,6 +315,15 @@
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# DEBUG-NEXT: G_TRUNC (opcode {{[0-9]+}}): 2 type indices, 0 imm indices
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# DEBUG-NEXT: .. type index coverage check SKIPPED: no rules defined
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# DEBUG-NEXT: .. imm index coverage check SKIPPED: no rules defined
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# DEBUG-NEXT: G_TRUNC_SSAT_S (opcode {{[0-9]+}}): 2 type indices, 0 imm indices
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# DEBUG-NEXT: .. type index coverage check SKIPPED: no rules defined
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# DEBUG-NEXT: .. imm index coverage check SKIPPED: no rules defined
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# DEBUG-NEXT: G_TRUNC_SSAT_U (opcode {{[0-9]+}}): 2 type indices, 0 imm indices
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# DEBUG-NEXT: .. type index coverage check SKIPPED: no rules defined
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# DEBUG-NEXT: .. imm index coverage check SKIPPED: no rules defined
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# DEBUG-NEXT: G_TRUNC_USAT_U (opcode {{[0-9]+}}): 2 type indices, 0 imm indices
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# DEBUG-NEXT: .. type index coverage check SKIPPED: no rules defined
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# DEBUG-NEXT: .. imm index coverage check SKIPPED: no rules defined
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# DEBUG-NEXT: G_CONSTANT (opcode {{[0-9]+}}): 1 type index, 0 imm indices
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# DEBUG-NEXT: .. the first uncovered type index: 1, OK
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# DEBUG-NEXT: .. the first uncovered imm index: 0, OK

‎llvm/test/MC/ELF/mc-dump.s‎

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@@ -12,7 +12,7 @@
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# CHECK-NEXT:0 Data Size:0 []
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# CHECK-NEXT: Symbol @0 _start
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# CHECK-NEXT:0 Org Offset:3 Value:0
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# CHECK-NEXT:3 Relaxable Size:2 <MCInst #1996 <MCOperand Expr:.Ltmp0>>
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# CHECK-NEXT:3 Relaxable Size:2 <MCInst #1999 <MCOperand Expr:.Ltmp0>>
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# CHECK-NEXT: Fixup @1 Value:.Ltmp0 Kind:4001
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# CHECK-NEXT:5 Data Size:16 [48,8b,04,25,00,00,00,00,48,8b,04,25,00,00,00,00]
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# CHECK-NEXT: Fixup @4 Value:f0@<variant 11> Kind:4017

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