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[WebAssembly] Add extra pattern for dot (llvm#151775)
Fixes llvm#50154
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‎llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td‎

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@@ -1213,6 +1213,27 @@ defm EXTMUL_LOW_U :
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defm EXTMUL_HIGH_U :
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SIMDExtBinary<I64x2, extmul_high_u, "extmul_high_i32x4_u", 0xdf>;
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// Pattern for i32x4.dot_i16x8_s
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def : Pat<
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(v4i32 (add
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(wasm_shuffle
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(v4i32 (extmul_low_s v8i16:$lhs, v8i16:$rhs)),
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(v4i32 (extmul_high_s v8i16:$lhs, v8i16:$rhs)),
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(i32 0), (i32 1), (i32 2), (i32 3),
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(i32 8), (i32 9), (i32 10), (i32 11),
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(i32 16), (i32 17), (i32 18), (i32 19),
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(i32 24), (i32 25), (i32 26), (i32 27)),
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(wasm_shuffle
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(v4i32 (extmul_low_s v8i16:$lhs, v8i16:$rhs)),
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(v4i32 (extmul_high_s v8i16:$lhs, v8i16:$rhs)),
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(i32 4), (i32 5), (i32 6), (i32 7),
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(i32 12), (i32 13), (i32 14), (i32 15),
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(i32 20), (i32 21), (i32 22), (i32 23),
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(i32 28), (i32 29), (i32 30), (i32 31)))
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),
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(v4i32 (DOT v8i16:$lhs, v8i16:$rhs))
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>;
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//===----------------------------------------------------------------------===//
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// Floating-point unary arithmetic
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//===----------------------------------------------------------------------===//

‎llvm/test/CodeGen/WebAssembly/simd-dot-reductions.ll‎

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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; RUN: llc < %s -mattr=+simd128 | FileCheck %s
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target triple = "wasm32-unknown-unknown"
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define <4 x i32> @dot_sext_1(<8 x i16> %a, <8 x i16> %b) {
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; CHECK-LABEL: dot_sext_1:
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; CHECK: .functype dot_sext_1 (v128, v128) -> (v128)
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; CHECK-NEXT: # %bb.0:
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; CHECK-NEXT: local.get 0
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; CHECK-NEXT: local.get 1
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; CHECK-NEXT: i32x4.dot_i16x8_s
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; CHECK-NEXT: # fallthrough-return
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%sext1 = sext <8 x i16> %a to <8 x i32>
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%sext2 = sext <8 x i16> %b to <8 x i32>
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%mul = mul <8 x i32> %sext1, %sext2
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%shuffle1 = shufflevector <8 x i32> %mul, <8 x i32> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
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%shuffle2 = shufflevector <8 x i32> %mul, <8 x i32> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
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%res = add <4 x i32> %shuffle1, %shuffle2
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ret <4 x i32> %res
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}
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define <4 x i32> @dot_sext_2(<8 x i16> %a, <8 x i16> %b) {
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; CHECK-LABEL: dot_sext_2:
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; CHECK: .functype dot_sext_2 (v128, v128) -> (v128)
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; CHECK-NEXT: # %bb.0:
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; CHECK-NEXT: local.get 0
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; CHECK-NEXT: local.get 1
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; CHECK-NEXT: i32x4.dot_i16x8_s
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; CHECK-NEXT: # fallthrough-return
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%sext1 = sext <8 x i16> %a to <8 x i32>
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%sext2 = sext <8 x i16> %b to <8 x i32>
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%mul = mul <8 x i32> %sext1, %sext2
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%shuffle1 = shufflevector <8 x i32> %mul, <8 x i32> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
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%shuffle2 = shufflevector <8 x i32> %mul, <8 x i32> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
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%res = add <4 x i32> %shuffle2, %shuffle1
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ret <4 x i32> %res
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}
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define <4 x i32> @dot_sext_self(<8 x i16> %v) {
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; CHECK-LABEL: dot_sext_self:
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; CHECK: .functype dot_sext_self (v128) -> (v128)
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; CHECK-NEXT: # %bb.0:
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; CHECK-NEXT: local.get 0
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; CHECK-NEXT: local.get 0
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; CHECK-NEXT: i32x4.dot_i16x8_s
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; CHECK-NEXT: # fallthrough-return
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%sext = sext <8 x i16> %v to <8 x i32>
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%mul = mul <8 x i32> %sext, %sext
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%shuffle1 = shufflevector <8 x i32> %mul, <8 x i32> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
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%shuffle2 = shufflevector <8 x i32> %mul, <8 x i32> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
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%res = add <4 x i32> %shuffle1, %shuffle2
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ret <4 x i32> %res
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}
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; INFO: Negative test
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define <4 x i32> @dot_zext(<8 x i16> %a, <8 x i16> %b) {
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; CHECK-LABEL: dot_zext:
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; CHECK: .functype dot_zext (v128, v128) -> (v128)
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; CHECK-NEXT: .local v128
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; CHECK-NEXT: # %bb.0:
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; CHECK-NEXT: local.get 0
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; CHECK-NEXT: local.get 1
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; CHECK-NEXT: i32x4.extmul_low_i16x8_u
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; CHECK-NEXT: local.tee 2
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; CHECK-NEXT: local.get 0
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; CHECK-NEXT: local.get 1
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; CHECK-NEXT: i32x4.extmul_high_i16x8_u
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; CHECK-NEXT: local.tee 1
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; CHECK-NEXT: i8x16.shuffle 0, 1, 2, 3, 8, 9, 10, 11, 16, 17, 18, 19, 24, 25, 26, 27
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; CHECK-NEXT: local.get 2
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; CHECK-NEXT: local.get 1
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; CHECK-NEXT: i8x16.shuffle 4, 5, 6, 7, 12, 13, 14, 15, 20, 21, 22, 23, 28, 29, 30, 31
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; CHECK-NEXT: i32x4.add
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; CHECK-NEXT: # fallthrough-return
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%zext1 = zext <8 x i16> %a to <8 x i32>
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%zext2 = zext <8 x i16> %b to <8 x i32>
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%mul = mul <8 x i32> %zext1, %zext2
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%shuffle1 = shufflevector <8 x i32> %mul, <8 x i32> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
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%shuffle2 = shufflevector <8 x i32> %mul, <8 x i32> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
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%res = add <4 x i32> %shuffle1, %shuffle2
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ret <4 x i32> %res
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}
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; INFO: Negative test
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define <4 x i32> @dot_wrong_shuffle(<8 x i16> %a, <8 x i16> %b) {
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; CHECK-LABEL: dot_wrong_shuffle:
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; CHECK: .functype dot_wrong_shuffle (v128, v128) -> (v128)
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; CHECK-NEXT: # %bb.0:
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; CHECK-NEXT: local.get 0
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; CHECK-NEXT: local.get 1
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; CHECK-NEXT: i32x4.extmul_low_i16x8_s
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; CHECK-NEXT: local.get 0
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; CHECK-NEXT: local.get 1
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; CHECK-NEXT: i32x4.extmul_high_i16x8_s
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; CHECK-NEXT: i32x4.add
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; CHECK-NEXT: # fallthrough-return
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%sext1 = sext <8 x i16> %a to <8 x i32>
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%sext2 = sext <8 x i16> %b to <8 x i32>
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%mul = mul <8 x i32> %sext1, %sext2
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%shuffle1 = shufflevector <8 x i32> %mul, <8 x i32> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
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%shuffle2 = shufflevector <8 x i32> %mul, <8 x i32> poison, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
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%res = add <4 x i32> %shuffle1, %shuffle2
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ret <4 x i32> %res
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}

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