@@ -33,6 +33,28 @@ define i8 @iv_used_in_exit_with_math(i8 noundef %g) {
3333; CHECK: [[MIDDLE_BLOCK]]:
3434; CHECK-NEXT: br label %[[RETURN:.*]]
3535; CHECK: [[VECTOR_EARLY_EXIT]]:
36+ ; CHECK-NEXT: [[TMP32:%.*]] = icmp eq i1 [[TMP8]], false
37+ ; CHECK-NEXT: [[TMP33:%.*]] = zext i1 [[TMP32]] to i64
38+ ; CHECK-NEXT: [[TMP12:%.*]] = add i64 1, [[TMP33]]
39+ ; CHECK-NEXT: [[TMP13:%.*]] = icmp eq i1 [[TMP7]], false
40+ ; CHECK-NEXT: [[TMP14:%.*]] = zext i1 [[TMP13]] to i64
41+ ; CHECK-NEXT: [[TMP15:%.*]] = add i64 0, [[TMP14]]
42+ ; CHECK-NEXT: [[TMP16:%.*]] = icmp ne i64 [[TMP14]], 1
43+ ; CHECK-NEXT: [[TMP17:%.*]] = select i1 [[TMP16]], i64 [[TMP15]], i64 [[TMP12]]
44+ ; CHECK-NEXT: [[TMP18:%.*]] = trunc i64 [[TMP17]] to i32
45+ ; CHECK-NEXT: [[TMP19:%.*]] = add i32 [[INDEX]], [[TMP18]]
46+ ; CHECK-NEXT: [[TMP20:%.*]] = trunc i32 [[TMP19]] to i8
47+ ; CHECK-NEXT: [[TMP21:%.*]] = icmp eq i1 [[TMP8]], false
48+ ; CHECK-NEXT: [[TMP22:%.*]] = zext i1 [[TMP21]] to i64
49+ ; CHECK-NEXT: [[TMP23:%.*]] = add i64 1, [[TMP22]]
50+ ; CHECK-NEXT: [[TMP24:%.*]] = icmp eq i1 [[TMP7]], false
51+ ; CHECK-NEXT: [[TMP25:%.*]] = zext i1 [[TMP24]] to i64
52+ ; CHECK-NEXT: [[TMP26:%.*]] = add i64 0, [[TMP25]]
53+ ; CHECK-NEXT: [[TMP27:%.*]] = icmp ne i64 [[TMP25]], 1
54+ ; CHECK-NEXT: [[TMP28:%.*]] = select i1 [[TMP27]], i64 [[TMP26]], i64 [[TMP23]]
55+ ; CHECK-NEXT: [[TMP29:%.*]] = trunc i64 [[TMP28]] to i32
56+ ; CHECK-NEXT: [[TMP30:%.*]] = add i32 [[INDEX]], [[TMP29]]
57+ ; CHECK-NEXT: [[TMP31:%.*]] = trunc i32 [[TMP30]] to i8
3658; CHECK-NEXT: br label %[[RETURN]]
3759; CHECK: [[SCALAR_PH]]:
3860; CHECK-NEXT: br label %[[LOOP_HEADER:.*]]
@@ -47,8 +69,8 @@ define i8 @iv_used_in_exit_with_math(i8 noundef %g) {
4769; CHECK-NEXT: [[EC:%.*]] = icmp eq i8 [[IV_NEXT]], 4
4870; CHECK-NEXT: br i1 [[EC]], label %[[RETURN]], label %[[LOOP_HEADER]], !llvm.loop [[LOOP3:![0-9]+]]
4971; CHECK: [[RETURN]]:
50- ; CHECK-NEXT: [[RES_IV1:%.*]] = phi i8 [ 32, %[[LOOP_LATCH]] ], [ [[IV]], %[[LOOP_HEADER]] ], [ 32, %[[MIDDLE_BLOCK]] ], [ [[OFFSET_IDX ]], %[[VECTOR_EARLY_EXIT]] ]
51- ; CHECK-NEXT: [[RES_IV2:%.*]] = phi i8 [ 0, %[[LOOP_LATCH]] ], [ [[IV]], %[[LOOP_HEADER]] ], [ 0, %[[MIDDLE_BLOCK]] ], [ [[OFFSET_IDX ]], %[[VECTOR_EARLY_EXIT]] ]
72+ ; CHECK-NEXT: [[RES_IV1:%.*]] = phi i8 [ 32, %[[LOOP_LATCH]] ], [ [[IV]], %[[LOOP_HEADER]] ], [ 32, %[[MIDDLE_BLOCK]] ], [ [[TMP20 ]], %[[VECTOR_EARLY_EXIT]] ]
73+ ; CHECK-NEXT: [[RES_IV2:%.*]] = phi i8 [ 0, %[[LOOP_LATCH]] ], [ [[IV]], %[[LOOP_HEADER]] ], [ 0, %[[MIDDLE_BLOCK]] ], [ [[TMP31 ]], %[[VECTOR_EARLY_EXIT]] ]
5274; CHECK-NEXT: [[RES:%.*]] = add i8 [[RES_IV1]], [[RES_IV2]]
5375; CHECK-NEXT: ret i8 [[RES]]
5476;
@@ -102,6 +124,26 @@ define i32 @iv_used_in_exit_with_loads(ptr align 4 dereferenceable(128) %src) {
102124; CHECK: [[MIDDLE_BLOCK]]:
103125; CHECK-NEXT: br label %[[RETURN:.*]]
104126; CHECK: [[VECTOR_EARLY_EXIT]]:
127+ ; CHECK-NEXT: [[TMP30:%.*]] = icmp eq i1 [[TMP8]], false
128+ ; CHECK-NEXT: [[TMP31:%.*]] = zext i1 [[TMP30]] to i64
129+ ; CHECK-NEXT: [[TMP12:%.*]] = add i64 1, [[TMP31]]
130+ ; CHECK-NEXT: [[TMP13:%.*]] = icmp eq i1 [[TMP7]], false
131+ ; CHECK-NEXT: [[TMP14:%.*]] = zext i1 [[TMP13]] to i64
132+ ; CHECK-NEXT: [[TMP15:%.*]] = add i64 0, [[TMP14]]
133+ ; CHECK-NEXT: [[TMP16:%.*]] = icmp ne i64 [[TMP14]], 1
134+ ; CHECK-NEXT: [[TMP17:%.*]] = select i1 [[TMP16]], i64 [[TMP15]], i64 [[TMP12]]
135+ ; CHECK-NEXT: [[TMP18:%.*]] = trunc i64 [[TMP17]] to i32
136+ ; CHECK-NEXT: [[TMP19:%.*]] = add i32 [[INDEX]], [[TMP18]]
137+ ; CHECK-NEXT: [[TMP20:%.*]] = icmp eq i1 [[TMP8]], false
138+ ; CHECK-NEXT: [[TMP21:%.*]] = zext i1 [[TMP20]] to i64
139+ ; CHECK-NEXT: [[TMP22:%.*]] = add i64 1, [[TMP21]]
140+ ; CHECK-NEXT: [[TMP23:%.*]] = icmp eq i1 [[TMP7]], false
141+ ; CHECK-NEXT: [[TMP24:%.*]] = zext i1 [[TMP23]] to i64
142+ ; CHECK-NEXT: [[TMP25:%.*]] = add i64 0, [[TMP24]]
143+ ; CHECK-NEXT: [[TMP26:%.*]] = icmp ne i64 [[TMP24]], 1
144+ ; CHECK-NEXT: [[TMP27:%.*]] = select i1 [[TMP26]], i64 [[TMP25]], i64 [[TMP22]]
145+ ; CHECK-NEXT: [[TMP28:%.*]] = trunc i64 [[TMP27]] to i32
146+ ; CHECK-NEXT: [[TMP29:%.*]] = add i32 [[INDEX]], [[TMP28]]
105147; CHECK-NEXT: br label %[[RETURN]]
106148; CHECK: [[SCALAR_PH]]:
107149; CHECK-NEXT: br label %[[LOOP_HEADER:.*]]
@@ -116,8 +158,8 @@ define i32 @iv_used_in_exit_with_loads(ptr align 4 dereferenceable(128) %src) {
116158; CHECK-NEXT: [[EC:%.*]] = icmp eq i32 [[IV_NEXT]], 32
117159; CHECK-NEXT: br i1 [[EC]], label %[[RETURN]], label %[[LOOP_HEADER]], !llvm.loop [[LOOP5:![0-9]+]]
118160; CHECK: [[RETURN]]:
119- ; CHECK-NEXT: [[RES_IV1:%.*]] = phi i32 [ 32, %[[LOOP_LATCH]] ], [ [[IV]], %[[LOOP_HEADER]] ], [ 32, %[[MIDDLE_BLOCK]] ], [ [[INDEX ]], %[[VECTOR_EARLY_EXIT]] ]
120- ; CHECK-NEXT: [[RES_IV2:%.*]] = phi i32 [ 0, %[[LOOP_LATCH]] ], [ [[IV]], %[[LOOP_HEADER]] ], [ 0, %[[MIDDLE_BLOCK]] ], [ [[INDEX ]], %[[VECTOR_EARLY_EXIT]] ]
161+ ; CHECK-NEXT: [[RES_IV1:%.*]] = phi i32 [ 32, %[[LOOP_LATCH]] ], [ [[IV]], %[[LOOP_HEADER]] ], [ 32, %[[MIDDLE_BLOCK]] ], [ [[TMP19 ]], %[[VECTOR_EARLY_EXIT]] ]
162+ ; CHECK-NEXT: [[RES_IV2:%.*]] = phi i32 [ 0, %[[LOOP_LATCH]] ], [ [[IV]], %[[LOOP_HEADER]] ], [ 0, %[[MIDDLE_BLOCK]] ], [ [[TMP29 ]], %[[VECTOR_EARLY_EXIT]] ]
121163; CHECK-NEXT: [[RES:%.*]] = add i32 [[RES_IV1]], [[RES_IV2]]
122164; CHECK-NEXT: ret i32 [[RES]]
123165;
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