Fixed consequences of PR llvm#112314. Removed support for load

Author: AnastasiyaChernikova

llvm/test/tools/llvm-exegesis/RISCV/latency-by-extension-C.s

@@ -46,20 +46,3 @@ C_SRLI-NEXT: key:
 C_SRLI-NEXT:   instructions:
 C_SRLI-NEXT:     - 'C_SRLI [[REG101:X[0-9]+]] [[REG102:X[0-9]+]] [[IMM10:i_0x[0-9]+]]'
 C_SRLI-DAG: ...
-
-
-# RUN: llvm-exegesis  -mode=latency -mtriple=riscv64-unknown-linux-gnu --mcpu=generic --benchmark-phase=assemble-measured-code -opcode-name=C_LD -mattr=+c | FileCheck --check-prefix=C_LD %s
-
-C_LD:      ---
-C_LD-NEXT: mode: latency
-C_LD-NEXT: key:
-C_LD-NEXT:   instructions:
-C_LD-NEXT:     - 'C_LD [[REG61:X[0-9]+]] [[REG62:X[0-9]+]] [[IMM6:i_0x[0-9]+]]'
-
-# RUN: llvm-exegesis  -mode=latency -mtriple=riscv64-unknown-linux-gnu --mcpu=generic --benchmark-phase=assemble-measured-code -opcode-name=C_LW -mattr=+c | FileCheck --check-prefix=C_LW %s
-
-C_LW:      ---
-C_LW-NEXT: mode: latency
-C_LW-NEXT: key:
-C_LW-NEXT:   instructions:
-C_LW-NEXT:     - 'C_LW [[REG71:X[0-9]+]] [[REG72:X[0-9]+]] [[IMM7:i_0x[0-9]+]]'

llvm/test/tools/llvm-exegesis/RISCV/latency-by-load.s

@@ -135,10 +135,6 @@ struct CodeTemplate {
   // the pointer to this memory is passed in to the function.
   unsigned ScratchSpacePointerInReg = 0;
 
-  // Require to pre-store value of a given register (fisrt)
-  // to scratch memory with given offset (second)
-  SmallVector<std::pair<unsigned, unsigned>, 2> PreinitScratchMemory;
-
 #if defined(__GNUC__) && (defined(__clang__) || LLVM_GNUC_PREREQ(8, 0, 0))
   // FIXME: GCC7 bug workaround. Drop #if after GCC7 no longer supported.
 private:

llvm/tools/llvm-exegesis/lib/CodeTemplate.h

@@ -344,7 +344,7 @@ void ExegesisRISCVTarget::processInstructionReservedRegs(
   case RISCV::C_ADDI4SPN:
     AssignedValue = MCOperand::createReg(RISCV::X2);
     break;
-  case RISCV::C_ADDI_NOP:
+  case RISCV::C_NOP:
   case RISCV::C_LI_HINT:
   case RISCV::C_LUI_HINT:
   case RISCV::C_MV_HINT: