kernel: more clippy fixes

Signed-off-by: Anhad Singh <[email protected]>

Author: Andy-Python-Programmer

src/aero_kernel/src/arch/x86_64/apic.rs

@@ -383,12 +383,12 @@ pub fn io_apic_set_redirect(vec: u8, gsi: u32, flags: u16, status: i32) {
         let mut redirect = 0x00;
 
         // Active high(0) or low(1)
-        if flags & 2 == 1 {
+        if (flags & (1 << 1)) != 0 {
             redirect |= (1 << 13) as u8;
         }
 
         // Edge(0) or level(1) triggered
-        if flags & 8 == 1 {
+        if (flags & (1 << 3)) != 0 {
             redirect |= (1 << 15) as u8;
         }
 

src/aero_kernel/src/drivers/block/ahci.rs

@@ -278,9 +278,9 @@ impl DmaRequest {
         match self.command {
             DmaCommand::Read => {
                 if lba48 {
-                    AtaCommand::AtaCommandReadDmaExt
+                    AtaCommand::ReadDmaExt
                 } else {
-                    AtaCommand::AtaCommandReadDma
+                    AtaCommand::ReadDma
                 }
             }
         }
@@ -295,65 +295,59 @@ impl DmaRequest {
 #[derive(Debug, PartialEq, Copy, Clone)]
 #[repr(u8)]
 pub enum AtaCommand {
-    AtaCommandWriteDma = 0xCA,
-    AtaCommandWriteDmaQueued = 0xCC,
-    AtaCommandWriteMultiple = 0xC5,
-    AtaCommandWriteSectors = 0x30,
+    WriteDma = 0xCA,
+    WriteDmaQueued = 0xCC,
+    WriteMultiple = 0xC5,
+    WriteSectors = 0x30,
 
-    AtaCommandReadDma = 0xC8,
-    AtaCommandReadDmaQueued = 0xC7,
-    AtaCommandReadMultiple = 0xC4,
-    AtaCommandReadSectors = 0x20,
+    ReadDma = 0xC8,
+    ReadDmaQueued = 0xC7,
+    ReadMultiple = 0xC4,
+    ReadSectors = 0x20,
 
-    AtaCommandWriteDmaExt = 0x35,
-    AtaCommandWriteDmaQueuedExt = 0x36,
-    AtaCommandWriteMultipleExt = 0x39,
-    AtaCommandWriteSectorsExt = 0x34,
+    WriteDmaExt = 0x35,
+    WriteDmaQueuedExt = 0x36,
+    WriteMultipleExt = 0x39,
+    WriteSectorsExt = 0x34,
 
-    AtaCommandReadDmaExt = 0x25,
-    AtaCommandReadDmaQueuedExt = 0x26,
-    AtaCommandReadMultipleExt = 0x29,
-    AtaCommandReadSectorsExt = 0x24,
+    ReadDmaExt = 0x25,
+    ReadDmaQueuedExt = 0x26,
+    ReadMultipleExt = 0x29,
+    ReadSectorsExt = 0x24,
 
-    AtaCommandPacket = 0xA0,
-    AtaCommandDeviceReset = 0x08,
+    Packet = 0xA0,
+    DeviceReset = 0x08,
 
-    AtaCommandService = 0xA2,
-    AtaCommandNop = 0,
-    AtaCommandNopNopAutopoll = 1,
+    Service = 0xA2,
+    Nop = 0,
+    NopNopAutopoll = 1,
 
-    AtaCommandGetMediaStatus = 0xDA,
+    GetMediaStatus = 0xDA,
 
-    AtaCommandFlushCache = 0xE7,
-    AtaCommandFlushCacheExt = 0xEA,
+    FlushCache = 0xE7,
+    FlushCacheExt = 0xEA,
 
-    AtaCommandDataSetManagement = 0x06,
+    DataSetManagement = 0x06,
 
-    AtaCommandMediaEject = 0xED,
+    MediaEject = 0xED,
 
-    AtaCommandIdentifyPacketDevice = 0xA1,
-    AtaCommandIdentifyDevice = 0xEC,
+    IdentifyPacketDevice = 0xA1,
+    IdentifyDevice = 0xEC,
 
-    AtaCommandSetFeatures = 0xEF,
-    AtaCommandSetFeaturesEnableReleaseInt = 0x5D,
-    AtaCommandSetFeaturesEnableServiceInt = 0x5E,
-    AtaCommandSetFeaturesDisableReleaseInt = 0xDD,
-    AtaCommandSetFeaturesDisableServiceInt = 0xDE,
+    SetFeatures = 0xEF,
+    SetFeaturesEnableReleaseInt = 0x5D,
+    SetFeaturesEnableServiceInt = 0x5E,
+    SetFeaturesDisableReleaseInt = 0xDD,
+    SetFeaturesDisableServiceInt = 0xDE,
 }
 
 impl AtaCommand {
     pub fn is_lba48(&self) -> bool {
-        match self {
-            AtaCommand::AtaCommandReadDmaExt | AtaCommand::AtaCommandWriteDmaExt => true,
-            _ => false,
-        }
+        matches!(self, AtaCommand::ReadDmaExt | AtaCommand::WriteDmaExt)
     }
 
     pub fn is_write(&self) -> bool {
-        match self {
-            AtaCommand::AtaCommandWriteDmaExt | AtaCommand::AtaCommandWriteDma => true,
-            _ => false,
-        }
+        matches!(self, AtaCommand::WriteDmaExt | AtaCommand::WriteDma)
     }
 }
 
@@ -655,8 +649,7 @@ impl HbaPort {
         let header = self.cmd_header_at(slot);
         let mut flags = header.flags.get();
 
-        if command == AtaCommand::AtaCommandWriteDmaExt || command == AtaCommand::AtaCommandWriteDma
-        {
+        if command == AtaCommand::WriteDmaExt || command == AtaCommand::WriteDma {
             flags.insert(HbaCmdHeaderFlags::W); // If its a write command add the write flag.
         } else {
             flags.remove(HbaCmdHeaderFlags::W); // If its a read command remove the write flag.
@@ -932,11 +925,10 @@ struct AhciDriver {
 
 impl PciDeviceHandle for AhciDriver {
     fn handles(&self, vendor_id: Vendor, device_id: DeviceType) -> bool {
-        match (vendor_id, device_id) {
-            (Vendor::Intel, DeviceType::SataController) => true,
-
-            _ => false,
-        }
+        matches!(
+            (vendor_id, device_id),
+            (Vendor::Intel, DeviceType::SataController)
+        )
     }
 
     fn start(&self, header: &PciHeader, _offset_table: &mut OffsetPageTable) {

src/aero_kernel/src/drivers/block/ide/channel.rs

@@ -121,7 +121,7 @@ impl IdeChannelData {
         self.base.set_drive_select(slave, false, 0);
         delay(1000);
 
-        self.base.set_command(AtaCommand::AtaCommandIdentifyDevice);
+        self.base.set_command(AtaCommand::IdentifyDevice);
         delay(1000);
 
         let status = self.base.status();
@@ -146,15 +146,7 @@ impl IdeChannelData {
         let lm = self.base.lba_mid();
         let lh = self.base.lba_hi();
 
-        match (lm, lh) {
-            (0x0, 0x0) => {
-                return true;
-            }
-
-            _ => {}
-        }
-
-        false
+        lm == 0 && lh == 0
     }
 
     pub fn setup_prdt(&mut self) {

src/aero_kernel/src/drivers/block/nvme/mod.rs

@@ -103,7 +103,7 @@ impl Capability {
 
 #[repr(u32)]
 enum CommandSet {
-    NVM = 0b000,
+    Nvm = 0b000,
 }
 
 const_assert_eq!(core::mem::size_of::<CommandSet>(), 4);
@@ -329,7 +329,7 @@ impl<'a> Controller<'a> {
         registers.acq.set(admin.completion_addr().as_u64());
 
         // Set the controller configuration and admin queue base addresses.
-        registers.cc.set_css(CommandSet::NVM);
+        registers.cc.set_css(CommandSet::Nvm);
         registers.cc.set_ams(ArbitrationMechanism::RoundRobin);
         registers.cc.set_iosqes(6); // 64 bytes
         registers.cc.set_iocqes(4); // 16 bytes

src/aero_kernel/src/drivers/mouse.rs

@@ -29,14 +29,14 @@ bitflags::bitflags! {
     /// Represents the flags currently set for the mouse.
     #[derive(Default)]
     pub struct MouseFlags: u8 {
-        const LEFT_BUTTON = 0b00000001;
-        const RIGHT_BUTTON = 0b00000010;
-        const MIDDLE_BUTTON = 0b00000100;
-        const ALWAYS_ONE = 0b00001000;
-        const X_SIGN = 0b00010000;
-        const Y_SIGN = 0b00100000;
-        const X_OVERFLOW = 0b01000000;
-        const Y_OVERFLOW = 0b10000000;
+        const LEFT_BUTTON = 0b0000_0001;
+        const RIGHT_BUTTON = 0b0000_0010;
+        const MIDDLE_BUTTON = 0b0000_0100;
+        const ALWAYS_ONE = 0b0000_1000;
+        const X_SIGN = 0b0001_0000;
+        const Y_SIGN = 0b0010_0000;
+        const X_OVERFLOW = 0b0100_0000;
+        const Y_OVERFLOW = 0b1000_0000;
     }
 }
 

src/aero_kernel/src/drivers/pci.rs

@@ -502,8 +502,8 @@ impl DeviceType {
 #[derive(Debug, PartialEq)]
 pub enum Vendor {
     Intel,
-    AMD,
-    NVIDIA,
+    Amd,
+    Nvidia,
     Qemu,
     Unknown(u32),
 }
@@ -512,8 +512,8 @@ impl Vendor {
     pub fn new(id: u32) -> Self {
         match id {
             0x8086 => Self::Intel,
-            0x1022 => Self::AMD,
-            0x10DE => Self::NVIDIA,
+            0x1022 => Self::Amd,
+            0x10DE => Self::Nvidia,
             0x1234 => Self::Qemu,
             _ => Self::Unknown(id),
         }

src/aero_kernel/src/drivers/pty.rs

@@ -181,10 +181,9 @@ impl TerminalDevice for Slave {
                 buffer.extend_from_slice(&[b'^', c + 0x40]);
             };
 
-            match *signo {
-                SIGINT => ctrl(termios.c_cc[VINTR]),
-                _ => {}
-            };
+            if *signo == SIGINT {
+                ctrl(termios.c_cc[VINTR])
+            }
         }
     }
 }

src/aero_kernel/src/logger.rs

@@ -74,7 +74,7 @@ impl log::Log for AeroLogger {
                         "(tid={}, pid={}) ",
                         task.tid().as_usize(),
                         task.pid().as_usize()
-                    )
+                    );
                 }
             }
 

src/aero_kernel/src/main.rs

@@ -52,6 +52,7 @@
 #![no_std]
 #![no_main]
 #![reexport_test_harness_main = "test_main"]
+// #![warn(clippy::pedantic)]
 
 #[macro_use]
 extern crate aero_proc;

src/aero_kernel/src/mem/paging/mapper.rs

@@ -530,17 +530,14 @@ impl<'a, P: PageTableFrameMapping> Mapper<Size2MiB> for MappedPageTable<'a, P> {
         &mut self,
         page: Page<Size2MiB>,
     ) -> Result<(PhysFrame<Size2MiB>, MapperFlush<Size2MiB>), UnmapError> {
-        let p4;
-
-        if self.level_5_paging_enabled {
+        let p4 = if self.level_5_paging_enabled {
             let p5 = &mut self.page_table;
 
-            p4 = self
-                .page_table_walker
-                .next_table_mut(&mut p5[page.p5_index()])?;
+            self.page_table_walker
+                .next_table_mut(&mut p5[page.p5_index()])?
         } else {
-            p4 = &mut self.page_table;
-        }
+            &mut self.page_table
+        };
 
         let p3 = self
             .page_table_walker
@@ -573,17 +570,14 @@ impl<'a, P: PageTableFrameMapping> Mapper<Size2MiB> for MappedPageTable<'a, P> {
         page: Page<Size2MiB>,
         flags: PageTableFlags,
     ) -> Result<MapperFlush<Size2MiB>, FlagUpdateError> {
-        let p4;
-
-        if self.level_5_paging_enabled {
+        let p4 = if self.level_5_paging_enabled {
             let p5 = &mut self.page_table;
 
-            p4 = self
-                .page_table_walker
-                .next_table_mut(&mut p5[page.p5_index()])?;
+            self.page_table_walker
+                .next_table_mut(&mut p5[page.p5_index()])?
         } else {
-            p4 = &mut self.page_table;
-        }
+            &mut self.page_table
+        };
 
         let p3 = self
             .page_table_walker
@@ -1156,9 +1150,7 @@ impl<'a> OffsetPageTable<'a> {
                                i: usize|
          -> Result<(bool, &mut PageTable), MapToError<Size4KiB>> {
             let entry = &mut table[i];
-            let created;
-
-            if !entry.flags().contains(PageTableFlags::PRESENT) {
+            let created = if !entry.flags().contains(PageTableFlags::PRESENT) {
                 let frame = FRAME_ALLOCATOR
                     .allocate_frame()
                     .ok_or(MapToError::FrameAllocationFailed)?;
@@ -1170,16 +1162,16 @@ impl<'a> OffsetPageTable<'a> {
                         | PageTableFlags::USER_ACCESSIBLE,
                 );
 
-                created = true;
+                true
             } else {
                 entry.set_flags(
                     PageTableFlags::PRESENT
                         | PageTableFlags::WRITABLE
                         | PageTableFlags::USER_ACCESSIBLE,
                 );
 
-                created = false;
-            }
+                false
+            };
 
             let page_table_ptr = {
                 let addr = entry.frame().unwrap().start_address().as_hhdm_virt();