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common/Cycles: Add high-precision counter support for riscv64
Signed-off-by: WenLei <[email protected]>
1 parent 06ba819 commit f8fc29d

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src/common/Cycles.h

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@@ -84,6 +84,10 @@ class Cycles {
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uint64_t tsc;
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asm volatile("stck %0" : "=Q" (tsc) : : "cc");
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return tsc;
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#elif defined(__riscv) && __riscv_xlen == 64
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uint64_t tsc;
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asm volatile ("rdtime %0" : "=r" (tsc));
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return tsc;
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#else
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#warning No high-precision counter available for your OS/arch
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return 0;

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