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content/learning-paths/servers-and-cloud-computing/neoverse-rdv3-swstack/1_introduction_rdv3.md

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FVPs enable developers to verify boot sequences, debug firmware handoffs, and even simulate RSE (Runtime Security Engine) behaviors, all pre-silicon.
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## Comparing RD-V3 FVP variants
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## Compare RD-V3 FVP variants
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To support different use cases and levels of platform complexity, Arm offers several virtual models based on the CSS-V3 architecture: RD-V3, RD-V3-R1, RD-V3-Cfg1 (CFG1), and RD-V3-Cfg2 (CFG2). While they share a common foundation, they differ in chip count, system topology, and simulation flexibility.
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content/learning-paths/servers-and-cloud-computing/neoverse-rdv3-swstack/2_rdv3_bootseq.md

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To ensure the platform transitions securely and reliably from power-on to operating system launch, this section introduces the roles and interactions of each firmware component within the RD-V3 boot process. You’ll learn how each component contributes to system initialization and how control is systematically handed off across the boot chain.
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## How the system boots up
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## Booting the system up
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In the RD-V3 platform, each firmware component such as TF-A, RSE, SCP, MCP, LCP, and UEFI operates independently but participates in a well-defined sequence. Each is delivered as a separate firmware image, yet they coordinate tightly through a structured boot flow and inter-processor signaling.
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***RSE acts as the platform’s security gatekeeper.***
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## Stage 2: Early hardware initialization (SCP / MCP)
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## Stage 2: Early hardware initialization (SCP/MCP)
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Once RSE completes verification, the System Control Processor (SCP, Cortex-M7) and the Management Control Processor (MCP, where present) are released from reset.
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They perform essential bring-up:
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* Initialize clocks, reset lines, and power domains
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* Prepare DRAM and interconnect
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* Enable the application processor (AP) cores and signal readiness to TF-A
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* Initializing clocks, reset lines, and power domains
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* Preparing DRAM and interconnect
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* Enabling the application processor (AP) cores and signaling readiness to TF-A
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***SCP/MCP are the ground crew bringing hardware systems online.***
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TF-A hands off control to UEFI firmware (EDK II), which performs device discovery and launches GRUB.
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Responsibilities:
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* Detect and initialize memory, PCIe, and boot devices
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* Generate ACPI and platform configuration tables
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* Locate and launch GRUB from storage or flash
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Responsibilities here include:
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* Detecting and initializing memory, PCIe, and boot devices
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* Generating ACPI and platform configuration tables
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* Locating and launching GRUB from storage or flash
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***EDK II and GRUB are like the first- and second-stage rockets launching the payload.***
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## Stage 5: Linux kernel boot
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GRUB loads the Linux kernel and passes full control to the OS.
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Responsibilities:
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* Initialize device drivers and kernel subsystems
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* Mount the root filesystem
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* Start user-space processes (for example, BusyBox)
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Responsibilities include:
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* Initializing device drivers and kernel subsystems
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* Mounting the root filesystem
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* Starting user-space processes (for example, BusyBox)
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***The Linux kernel is the spacecraft - it takes over and begins its mission.***
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The right-facing arrows in `UEFI → GRUB → Linux` indicate a **direct execution path**—each stage passes control directly to the next.
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{{% /notice %}}
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This layered approach supports modular testing, independent debugging, and early simulation—essential for secure and robust platform bring-up.
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This layered approach supports modular testing, independent debugging, and early simulation, which is essential for secure and robust platform bring-up.
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## Summary
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In this section, you have:
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**In this section, you have:**
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* Explored the full boot sequence of the RD-V3 platform, from power-on to Linux login
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* Understood the responsibilities of TF-A, RSE, SCP, MCP, LCP, and UEFI
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* Learned how secure boot is enforced and how each module hands off control

content/learning-paths/servers-and-cloud-computing/neoverse-rdv3-swstack/3_rdv3_sw_build.md

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### FIXED, DO NOT MODIFY
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layout: learningpathall
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---
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## Building the RD-V3 Reference Platform Software Stack
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In this module, you’ll set up your development environment on any Arm-based server and build the firmware stack required to simulate the RD-V3 platform. This Learning Path was tested on an AWS `m7g.4xlarge` Arm-based instance running Ubuntu 22.04.
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## Step 1: Prepare the Development Environment
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## Step 1: Set up your development environment
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First, ensure your system is up to date and install the required tools and libraries:
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First, check that your system is current and install the required dependencies:
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```bash
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sudo apt update
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sudo apt install -y curl git
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```
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Configure git as follows:
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Configure git:
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```
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git config --global user.name "<your-name>"
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git config --global user.email "<[email protected]>"
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```
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## Step 2: Fetch the source code
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The RD‑V3 platform firmware stack consists of many independent components, such as TF‑A, SCP, RSE, UEFI, Linux kernel, and Buildroot. Each component is maintained in a separate Git repository. To manage and synchronize these repositories efficiently, use the `repo` tool. It simplifies syncing the full platform software stack from multiple upstreams.
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The RD‑V3 platform firmware stack consists of many independent components, such as:
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- TF‑A
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- SCP
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- RSE
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- UEFI
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- Linux kernel
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- Buildroot.
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Each component is maintained in a separate Git repository. To manage and synchronize these repositories efficiently, use the `repo` tool. It simplifies syncing the full platform software stack from multiple upstreams.
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If `repo` is not installed, you can download it and add it to your `PATH`:
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content/learning-paths/servers-and-cloud-computing/neoverse-rdv3-swstack/4_rdv3_on_fvp.md

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## Simulating RD-V3 with an Arm FVP
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In the previous section, you built the complete CSS-V3 firmware stack.
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Now you’ll use an Arm Fixed Virtual Platform (FVP) to simulate the system, allowing you to verify the boot sequence without any physical silicon.
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This simulation brings up the full stack from BL1 to a Linux shell using Buildroot.
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In the previous section, you built the complete CSS-V3 firmware stack. Now you’ll use an Arm Fixed Virtual Platform (FVP) to simulate the system, allowing you to verify the boot sequence without any physical silicon. This simulation brings up the full stack from BL1 to a Linux shell using Buildroot.
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## Step 1: Download and Install the FVP Model
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## Step 1: Download and install the FVP model
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Each reference design release tag corresponds to a specific FVP model version.
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For example, the **RD-INFRA-2025.07.03** tag is designed to work with **FVP version 11.29.35**.
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The FVP installation might prompt you with a few questions,choosing the defaults is sufficient for this Learning Path. By default, the FVP installs under `/home/ubuntu/FVP_RD_V3`.
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The FVP installation might prompt you with a few questions, choose the default settings. By default, the FVP installs under `/home/ubuntu/FVP_RD_V3`.
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## Step 2: remote desktop setup
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## Step 2: set up remote desktop
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The RD‑V3 FVP model launches multiple UART consoles. Each console is mapped to a separate terminal window for different subsystems (for example, Neoverse V3, Cortex‑M55, Cortex‑M7, panel).
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If you’re accessing the platform over SSH, these UART consoles can still be displayed, but network latency and graphical forwarding can severely degrade performance.
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To interact with different UARTs more efficiently, it is recommend to install a remote desktop environment using `XRDP`. This provides a smoother user experience when dealing with multiple terminal windows and system interactions.
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To interact with different UARTs more efficiently, install a remote desktop environment using `XRDP`. This provides a smoother user experience when dealing with multiple terminal windows and system interactions.
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Install required packages and enable XRDP:
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To allow remote desktop connections, you need to open port 3389 (RDP) in your AWS EC2 security group:
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Wayland is the default display server on Ubuntu 22.04, but it is not compatible with XRDP.
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To enable XRDP remote sessions, you must switch to Xorg by modifying the GDM configuration.
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To enable XRDP remote sessions, you must switch to Xorg by modifying the GDM configuration:
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Open the `/etc/gdm3/custom.conf` in a text editor.
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Open the `/etc/gdm3/custom.conf` in a text editor. Find the line:
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Find the line:
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After restart, XRDP sessions will use Xorg and you can connect to it in the Arm server using Remote Desktop.
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After restart, XRDP sessions will use Xorg and you can connect to it in the Arm server using a remote desktop.
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## Step 3: launch the simulation
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Once connected using Remote Desktop, open a terminal and launch the RD‑V3 FVP simulation:
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Once connected using a remote desktop, open a terminal and launch the RD‑V3 FVP simulation:
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```bash
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content/learning-paths/servers-and-cloud-computing/neoverse-rdv3-swstack/5_rdv3_modify.md

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## Build and run the RD-V3-R1 dual-chip platform
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## The RD-V3-R1 dual-chip platform
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The RD-V3-R1 platform is a dual-chip simulation environment built to model multi-die Arm server SoCs. It expands on the single-die RD-V3 design by introducing a second application processor and a Management Control Processor (MCP).
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### Key use cases
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Key use cases of RD-V3-R! are:
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- Simulating a chiplet-style boot flow with two APs
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Key differences from RD-V3 are:
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Refer to the [RD-V3-R1 Release Tags](https://neoverse-reference-design.docs.arm.com/en/latest/platforms/rdv3.html#release-tags) to pick the FVP version that matches your tag, then download and install it:
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## Step 3: Build the Firmware
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## Step 3: Build the firmware
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If you built the Docker image earlier, you can reuse it for RD-V3-R1.
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Run the full build and package flow:
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content/learning-paths/servers-and-cloud-computing/neoverse-rdv3-swstack/_index.md

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minutes_to_complete: 90
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who_is_this_for: This Learning Path is for firmware developers, system architects, and silicon validation engineers building Arm Neoverse CSS platforms. It focuses on pre-silicon development for the CSS-V3 reference design using Fixed Virtual Platforms (FVPs). You’ll build, customize, and validate firmware on the RD-V3 platform before hardware is available.
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who_is_this_for: This advanced topic is for firmware developers, system architects, and silicon validation engineers working on Arm Neoverse CSS platforms who require a pre-silicon workflow for the CSS-V3 reference design using Fixed Virtual Platforms (FVPs).
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learning_objectives:
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- Understand the architecture of Arm Neoverse CSS-V3 as the foundation for scalable server-class platforms
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- Build and boot the RD-V3 firmware stack using TF-A, SCP, RSE, and UEFI
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- Simulate multi-core, multi-chip systems with Arm FVP models and interpret boot logs
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- Modify platform control firmware to test custom logic and validate via pre-silicon simulation
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- Explain the CSS-V3 architecture and the RD-V3 firmware boot sequence (TF-A, RSE, SCP/MCP/LCP, UEFI/GRUB, Linux)
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- Set up a containerized build environment and sync sources with a pinned manifest using repo
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- Build and boot the RD-V3 firmware stack on FVP and map UART consoles to components
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- Interpret boot logs to verify bring-up and diagnose boot-stage issues
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- Modify platform control firmware (for example, SCP/MCP) and validate changes via pre-silicon simulation
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- Launch a dual-chip RD-V3-R1 simulation and verify AP/MCP coordination
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prerequisites:
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- Access to an Arm Neoverse-based Linux machine (cloud or local) with at least 80 GB of free storage
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- Familiarity with Linux command-line tools and basic scripting

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