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Copy file name to clipboardExpand all lines: content/learning-paths/servers-and-cloud-computing/refinfra-debug/debugging-bl1-3.md
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@@ -53,13 +53,13 @@ If you would like to add platform-specific debug files, the memory locations are
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These commands load the symbol files and specify the memory address location, updating **workspace** to include the path to your own workspace directory.
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The `EL` (Exception Level) and number at the end of each command, for example, `EL3:0`, ensure the symbols are loaded into the correct virtual address space and at the correct memory offset. ATF uses absolute addresses for its symbols so we use an offset of 0.
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The `EL` (Exception Level) and number at the end of each command, for example, `EL3:0`, ensure the symbols are loaded into the correct virtual address space and at the correct memory offset. ATF uses absolute addresses for its symbols so you can use an offset of 0.
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When you connect the debugger, the primary CPU will be "spinning" on a ``b .`` instruction from the one you manually added to the ``bl1_entrypoint`` function.
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In this debug panel, you can find common debugging functions like stepping and skipping.
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Set a breakpoint in the function you would like to debug. In this example, we set a breakpoint at ``bl1_main()``.
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Set a breakpoint in the function you would like to debug. In this example, you can set a breakpoint at ``bl1_main()``.
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Simply interrupt the CPU and enter debug command `set $pc += 4'; you can now step through and debug the TF-A boot flow.
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---
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## Debugging BL31
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Setting a breakpoint for BL1 is simple, but how do we set a breakpoint for BL31?
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Setting a breakpoint for BL1 is simple, but how can you set a breakpoint for BL31?
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In the tabs panel at the bottom, click the plus **(`+`)** and **add other views**. Here there are multiple views available such as **Register View** and **Memory View**.
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For this example, we are only interested in the **Functions** view.
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For this example, you are only interested in the **Functions** view.
Following the previous chapter, we should still be in TF-A. In the Commands window, execute the following command to break at the start of UEFI: ``break EL2N:0xE0000000``. Execute until we are in EL2N address space. This is because the script depends on the current address space when loading in symbols.
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Following the previous section, you should still be in TF-A. In the Commands window, execute the following command to break at the start of UEFI: ``break EL2N:0xE0000000``. Execute until we are in EL2N address space. This is because the script depends on the current address space when loading in symbols.
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In Arm DS, go to the scripts tab and hit "Import a script or directory" then "Import a DS or Jython script"
To follow this learning path, you need Arm Development Studio installed, and an appropriate license. See the [Arm Development Studio Install Guide](/install-guides/armds) for instructions. Screenshots in this tutorial are from Arm Development Studio 2023.0.
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To debug the Neoverse N2 reference firmware, you need Arm Development Studio installed, and an appropriate license. See the [Arm Development Studio Install Guide](/install-guides/armds) for instructions. Screenshots are from Arm Development Studio 2023.0.
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You also need the Neoverse RD-N2 Reference Design Software Stack set up, and an associated FVP (Fixed Virtual Platform). For further information, see [Get started with the Neoverse Reference Design Software Stack](/learning-paths/servers-and-cloud-computing/refinfra-quick-start/).
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You also need the Neoverse RD-N2 Reference Design Software Stack set up, and an associated FVP (Fixed Virtual Platform). You should be familiar with [Get started with the Neoverse Reference Design Software Stack](/learning-paths/servers-and-cloud-computing/refinfra-quick-start/) before you start debugging.
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## SCP/LCP/RSE debug
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Modify this run script:
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If you want to debug SCP/LCP/RSE, you need to modify the run script:
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{{% /notice %}}
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Run the script to launch the model:
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```bash
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./run_model.sh
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```
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## AP debug
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If you remove the -R flag, RSE CPU wait is on hold and the APs will be powered off. You will have to kick-off the run, then it starts booting from RSE to AP cores. In this case, do *not* remove the -R flag.
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To debug the AP, you do not want to remove the `-R` flag.
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If you remove the `-R` flag, RSE CPU waits and the APs will be powered off. You will have to kick-off the run, then it starts booting from RSE to AP cores.
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This will be explained further in BL1, BL31, and BL33 chapters.
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{{% notice FVP Accuracy %}}
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FVPS do not completely model the `IMP DEF` behavior that RTL does.
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FVPs do not model the `IMP DEF` behavior with the same level of detail included in the RTL design.
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FVPs also do not model cycles, performance, or `AXI/ACE/AHB/CHI`bus-level transactions.
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FVPs do not model cycles, performance, or `AXI/ACE/AHB/CHI` level transactions.
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