drm/asahi: mmu: Add some barriers

Just being paranoid.

Signed-off-by: Asahi Lina <[email protected]>

Author: hoshinolina

drivers/gpu/drm/asahi/mmu.rs

@@ -299,6 +299,7 @@ impl gpuvm::DriverGpuVm for VmInner {
         self.unmap_pages(va.addr(), UAT_PGSZ, (va.range() >> UAT_PGBIT) as usize)?;
 
         if let Some(asid) = self.slot() {
+            fence(Ordering::SeqCst);
             mem::tlbi_range(asid as u8, va.addr() as usize, va.range() as usize);
             mod_dev_dbg!(
                 self.dev,
@@ -354,6 +355,7 @@ impl gpuvm::DriverGpuVm for VmInner {
         self.unmap_pages(unmap_start, UAT_PGSZ, (unmap_range >> UAT_PGBIT) as usize)?;
 
         if let Some(asid) = self.slot() {
+            fence(Ordering::SeqCst);
             mem::tlbi_range(asid as u8, unmap_start as usize, unmap_range as usize);
             mod_dev_dbg!(
                 self.dev,
@@ -656,6 +658,7 @@ impl KernelMapping {
                 self.size()
             );
         }
+        fence(Ordering::SeqCst);
 
         // If we don't have (and have never had) a VM slot, just return
         let slot = match owner.slot() {
@@ -806,6 +809,7 @@ impl Drop for KernelMapping {
         }
 
         if let Some(asid) = owner.slot() {
+            fence(Ordering::SeqCst);
             mem::tlbi_range(asid as u8, self.iova() as usize, self.size());
             mod_dev_dbg!(
                 owner.dev,